| Author |
Message |
Jim Brooks
Guest
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 Posted:
Fri Sep 23, 2005 11:11 pm Post subject:
Intel strikes back with a parallel x86 design |
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Signs and portents as JMS would say.
Stevel Jobs does a 180' and enthusiastically becomes
Intel's bedfellow on the basis of a compelling roadmap.
That roadmap has to be pretty darned interesting.
Intel claims they aren't developing Hyperthreading anymore.
But Intel now knows all the issues involved in hw threading.
Why not exploit that know-how as an advantage over AMD?
AMD has only a fraction of the resources that Intel has,
so AMD will have a hard time catching up
My speculation is that Intel will build on their HyperThread experience
to design a "parallel x86". x86 CPUs have become superscalar machines.
The next evolutionary step is a parallel machine. Dual-cores are only
an inefficient stop-gap design that wastes transistors with duplicated
or unnecessary resources (eg coherency logic between the core's caches).
My ideas for a parallel x86:
- thread quantums
The idea is to move coarse-granularity timer-driven time-slicing
into the hw so that time-slices can be instruction-granular.
- thread prioritization
The OS assigns static priorities to threads.
The hw computes dynamic priorites according to static priority
and instruction issue for a thread per quantum.
- sub-threads
Support for parallel programming.
A reduced 80386 Task-State Segment (TSS) will be defined
(avoid saving unnecessary registers such as ES/FS/GS)
A variant of JUMP [TSS] with a new Thread bit defined in the TSS
will spawn a sub-thread (analoguous to a UNIX child process).
The sub-thread can stop by IRET [TSS].
A new WAIT [TSS] will synchronize the parent with its sub-thread.
- thread exceptions
A thread can raise exceptions to end or suspend itself.
- cache lines have thread bits in addition to LRU bits
When one cache line has to be evicted, victimize the line owned
by a lower-priorty thread.
- ALUs: 8 simple, 4 complex.
- FPUs: 4 FADD, 4 FMUL, 2 FLDST.
- deprecation of FP SIMD instruction set
SIMD was a good idea for a single-thread CPU as it let the control unit
issue a single-instruction for multiple-data without resource hazards.
But a multi-threaded control unit would function optimally with
a wide window of decomposed (SISD) instructions. |
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Guest
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| Posted:
Fri Sep 23, 2005 11:56 pm Post subject:
Re: Intel strikes back with a parallel x86 design |
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Jim Brooks wrote:
| Quote: | Stevel Jobs does a 180' and enthusiastically becomes
Intel's bedfellow on the basis of a compelling roadmap.
That roadmap has to be pretty darned interesting.
|
Only in comparison to PowerPC roadmaps.....
| Quote: | Intel claims they aren't developing Hyperthreading anymore.
|
Perhaps they understand the costs and benefits better now.
| Quote: | My speculation is that Intel will build on their HyperThread experience
to design a "parallel x86". x86 CPUs have become superscalar machines.
The next evolutionary step is a parallel machine. Dual-cores are only
an inefficient stop-gap design that wastes transistors with duplicated
or unnecessary resources (eg coherency logic between the core's caches).
|
Actually, a dual core chip is more efficient than a hyperthreaded chip
in terms of delivering performance to applications and especially so
when a power limit is imposed. A hyperthreaded P4 gets (lets just say)
25% more performance than its unithreaded version; whereas a dual core
chip gets closer to 75% more performance than a unithreaded version.
Now if the dual core chip is small enough to yield well; it wins!
| Quote: | My ideas for a parallel x86:
- thread quantums
- thread prioritization
- sub-threads
- thread exceptions
- cache lines have thread bits in addition to LRU bits
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All these complicated additions to support an abandoned evolutionary
path
And there is still no high performance means to synchronize these
cooperating multiple tasks...And by high performance I mean
bigO(ln(n)); not the current bigO(n**3) typical (with worst case of
NP-complete if the timing is just right).
| Quote: | - ALUs: 8 simple, 4 complex.
- FPUs: 4 FADD, 4 FMUL, 2 FLDST.
|
What give you the idea that this would outperform 4 simpler cores that
are even less superscalar than current architectures (with the same
on-die cache hierarchy)?
| Quote: | - deprecation of FP SIMD instruction set
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Never happen, in fact, I suspect just the opposite! SSE will be
enhanced for new purposes such as (//pure speculation mode = on) A)
Fixed point Decimal, B) Floating Point Decimal, C) 128-bit binary
Floating point, or D) various 3D graphics computations. |
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Tony Hill
Guest
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| Posted:
Sat Sep 24, 2005 5:50 am Post subject:
Re: Intel strikes back with a parallel x86 design |
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On Fri, 23 Sep 2005 18:11:09 GMT, Jim Brooks <nobody@nowhere.com>
wrote:
| Quote: | Signs and portents as JMS would say.
Stevel Jobs does a 180' and enthusiastically becomes
Intel's bedfellow on the basis of a compelling roadmap.
That roadmap has to be pretty darned interesting.
Intel claims they aren't developing Hyperthreading anymore.
But Intel now knows all the issues involved in hw threading.
Why not exploit that know-how as an advantage over AMD?
AMD has only a fraction of the resources that Intel has,
so AMD will have a hard time catching up
My speculation is that Intel will build on their HyperThread experience
to design a "parallel x86". x86 CPUs have become superscalar machines.
The next evolutionary step is a parallel machine. Dual-cores are only
an inefficient stop-gap design that wastes transistors with duplicated
or unnecessary resources (eg coherency logic between the core's caches).
My ideas for a parallel x86:
|
And just how much do you need to change existing software to work with
your new model?
Hardware is cheap, software is expensive. Make your hardware to work
well with the software that exists and you'll do a LOT better than the
next guy who is making hardware for software they hope to be invented
in a few years time.
-------------
Tony Hill
hilla <underscore> 20 <at> yahoo <dot> ca |
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Nick Maclaren
Guest
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| Posted:
Sat Sep 24, 2005 2:04 pm Post subject:
Re: Intel strikes back with a parallel x86 design |
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In article <1127501813.358254.121840@g44g2000cwa.googlegroups.com>,
<MitchAlsup@aol.com> wrote:
| Quote: | Jim Brooks wrote:
Intel claims they aren't developing Hyperthreading anymore.
Perhaps they understand the costs and benefits better now.
|
Even Intel can learn from making avoidable mistakes :-)
Has anyone seen a CLEAR statement from Intel that Hyperthreading is
on the way out? The best I have seen is the standard political
statement "Building on the massive success of the previous design,
we are abandoning it and reversing direction."
| Quote: | My speculation is that Intel will build on their HyperThread experience
to design a "parallel x86". x86 CPUs have become superscalar machines.
The next evolutionary step is a parallel machine. Dual-cores are only
an inefficient stop-gap design that wastes transistors with duplicated
or unnecessary resources (eg coherency logic between the core's caches).
Actually, a dual core chip is more efficient than a hyperthreaded chip
in terms of delivering performance to applications and especially so
when a power limit is imposed. A hyperthreaded P4 gets (lets just say)
25% more performance than its unithreaded version; whereas a dual core
chip gets closer to 75% more performance than a unithreaded version.
Now if the dual core chip is small enough to yield well; it wins!
|
When I first saw Eggars' papers, I thought that it was a very neat
idea. I then repeated and extended her analysis, and noted the
comparisons she did NOT make. It became very clear that SMT would
gain significantly only when the cost of building a chip (in area,
effort and power) was dominated by the ALUs/FPUs/etc. That hasn't
been true since 1990, and has been the converse of the truth since
2000. Note that sharing special-purpose units has been standard
practice for at least 30 years.
Assuming her analysis is correct (I can't check her figures, merely
their consistency), a well-designed SMT system based on a good RISC
could do a lot better. But you can't avoid the generic point that
the smaller the grain of your parallelism, the harder it is to get
good scalability. Tera-style switching on memory access is a good
method for the noughties, but I doubt that even it will be viable
in the tens.
Frankly, I can't see ANY technology helping much while we insist
on designing hardware to cater to the ghastlier serial codes.
Regards,
Nick Maclaren. |
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Nick Maclaren
Guest
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| Posted:
Sat Sep 24, 2005 2:12 pm Post subject:
Re: Intel strikes back with a parallel x86 design |
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In article <kj89j1lktjpusqdea17i5ndcmnhr4un6bj@4ax.com>,
Tony Hill <hilla_nospam_20@yahoo.ca> wrote:
| Quote: |
And just how much do you need to change existing software to work with
your new model?
Hardware is cheap, software is expensive. Make your hardware to work
well with the software that exists and you'll do a LOT better than the
next guy who is making hardware for software they hope to be invented
in a few years time.
|
If you can do that, you can almost certainly square circles, travel
faster than light and produce an immortality treatment.
Hardware is engineered, software is hacked up. Even those of us
with pretty powerful imaginations have been unable to think of any
hardware designs that would work well with the software that exists
and yet not violate the laws of physics.
Regards,
Nick Maclaren. |
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Oliver S.
Guest
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| Posted:
Sat Sep 24, 2005 4:15 pm Post subject:
Re: Intel strikes back with a parallel x86 design |
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I'd rather like to see an x86-architecture with a lot of cores like
Niagara. These cores shouldn't be superscalar, but should feature mul-
tiple execution-units to enable multiple threads (I think four threads
would be best) to run in parallel physically. Branch-prediction and
prefetching could be dropped because the threads would be able to sat-
urate the execution-units anyway. The FPU sould remain pipelined of
course to enable the threads to feed the adder(s) and multiplier(s)
every cycle. So the per-cycle throughput of a single thread wouldn't
be better as for an old 486 processor.
The only problem I see with this architecture is, that a lot of pro-
grams would have to be parallelized to take advantage of this. In most
cases this isn't necessary (i.e. for desktop business-applications,
word processors etc). In some cases like video-encoders or raytracers,
this is easy to handle. But in some cases like with games this is rea-
lly challangeing. |
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Yousuf Khan
Guest
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| Posted:
Sun Sep 25, 2005 12:15 am Post subject:
Re: Intel strikes back with a parallel x86 design |
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Jim Brooks wrote:
| Quote: | Signs and portents as JMS would say.
Stevel Jobs does a 180' and enthusiastically becomes
Intel's bedfellow on the basis of a compelling roadmap.
That roadmap has to be pretty darned interesting.
Intel claims they aren't developing Hyperthreading anymore.
But Intel now knows all the issues involved in hw threading.
Why not exploit that know-how as an advantage over AMD?
AMD has only a fraction of the resources that Intel has,
so AMD will have a hard time catching up
|
I would hardly call the knowledge they gained in hyperthreading to be
knowledge that will come in handy later. Whatever they learned about HT
was only relevent to a Pentium 4, it can't apply to Pentium M.
| Quote: |
My speculation is that Intel will build on their HyperThread experience
to design a "parallel x86". x86 CPUs have become superscalar machines.
The next evolutionary step is a parallel machine. Dual-cores are only
an inefficient stop-gap design that wastes transistors with duplicated
or unnecessary resources (eg coherency logic between the core's caches).
My ideas for a parallel x86:
- thread quantums
|
<snip>
You're from the comp.arch group aren't you?
Yousuf Khan |
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Del Cecchi
Guest
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| Posted:
Sun Sep 25, 2005 5:17 am Post subject:
Re: Intel strikes back with a parallel x86 design |
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"Yousuf Khan" <bbbl67@ezrs.com> wrote in message
news:Rs-dnT5tkf3jQajeRVn-uA@rogers.com...
| Quote: | Jim Brooks wrote:
Signs and portents as JMS would say.
Stevel Jobs does a 180' and enthusiastically becomes
Intel's bedfellow on the basis of a compelling roadmap.
That roadmap has to be pretty darned interesting.
Intel claims they aren't developing Hyperthreading anymore.
But Intel now knows all the issues involved in hw threading.
Why not exploit that know-how as an advantage over AMD?
AMD has only a fraction of the resources that Intel has,
so AMD will have a hard time catching up
I would hardly call the knowledge they gained in hyperthreading to be
knowledge that will come in handy later. Whatever they learned about HT
was only relevent to a Pentium 4, it can't apply to Pentium M.
My speculation is that Intel will build on their HyperThread
experience
to design a "parallel x86". x86 CPUs have become superscalar
machines.
The next evolutionary step is a parallel machine. Dual-cores are only
an inefficient stop-gap design that wastes transistors with duplicated
or unnecessary resources (eg coherency logic between the core's
caches).
My ideas for a parallel x86:
- thread quantums
snip
You're from the comp.arch group aren't you?
Yousuf Khan
doesn't ring any bells from comp.arch |
Has only a few posts on groups.google.com search, my guess is
comp.sys.intel |
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Nathan Bates
Guest
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| Posted:
Sun Sep 25, 2005 5:52 am Post subject:
Re: Intel strikes back with a parallel x86 design |
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| Quote: | Jim Brooks wrote:
Signs and portents as JMS would say.
Stevel Jobs does a 180' and enthusiastically becomes
Intel's bedfellow on the basis of a compelling roadmap.
That roadmap has to be pretty darned interesting.
Intel claims they aren't developing Hyperthreading anymore.
But Intel now knows all the issues involved in hw threading.
Why not exploit that know-how as an advantage over AMD?
AMD has only a fraction of the resources that Intel has,
so AMD will have a hard time catching up
I would hardly call the knowledge they gained in hyperthreading to be
knowledge that will come in handy later. Whatever they learned about HT
was only relevent to a Pentium 4, it can't apply to Pentium M.
|
That's like saying none of the knowledge gained from
the P6 design carried over to the Williamette design.
About the Mac, Jobs looked at the roadmaps of both Intel and AMD.
There were other factors, but Jobs was more intrigued by Intel's.
Why?
Turning to the server-blade market, when you need more racks of blades,
the consideration is packing as much processing performance per watt
(and space).
There is only so much instruction parallelism in one thread of code.
Single-threaded superscalars core often stall because of
data dependencies, resource locks, cache misses,etc.
Multi-threaded (parallel) cores are the future. |
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Anne & Lynn Wheeler
Guest
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| Posted:
Sun Sep 25, 2005 6:02 am Post subject:
Re: Intel strikes back with a parallel x86 design |
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Jim Brooks <nobody@nowhere.com> writes:
| Quote: | My speculation is that Intel will build on their HyperThread experience
to design a "parallel x86". x86 CPUs have become superscalar machines.
The next evolutionary step is a parallel machine. Dual-cores are only
an inefficient stop-gap design that wastes transistors with duplicated
or unnecessary resources (eg coherency logic between the core's caches).
|
intel back to the future? old posting
http://www.garlic.com/~lynn/2001n.html#83 CM-5 Thinking Machines, Supercomputers
that includes pieces of some old news articles ... inclucing an NYT
article from 6/15/92 titled Foray into Mainstream for Parallel
Computing. some number of the efforts from the period were parallel
x86s ... also can anybody say Intel Paragon?
how 'bout ncube:
http://en.wikipedia.org/wiki/NCUBE
iPSC
http://www.cs.kuleuven.ac.be/museum/multiproc/myosotis-E.html
IPSC/2 hypercube
http://portal.acm.org/citation.cfm?id=255159
red asci, originally pentium pro, then updated to pentium II ..
http://en.wikipedia.org/wiki/Intel_ASCI_Red
http://www.sandia.gov/ASCI/Red/
in the mid-90s, there there were so many people tied up in working on
such stuff that one such new mpp project ... looking around for people
to lead the effort, got around to asking my wife and me. I ran thru
all the names I could think of them to ask ... and they pointed out
that everybody I named, were all busy, tied up on something else
--
Anne & Lynn Wheeler | http://www.garlic.com/~lynn/ |
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Joe Seigh
Guest
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| Posted:
Sun Sep 25, 2005 4:15 pm Post subject:
Re: Intel strikes back with a parallel x86 design |
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YKhan wrote:
| Quote: | Del Cecchi wrote:
doesn't ring any bells from comp.arch
Has only a few posts on groups.google.com search, my guess is
comp.sys.intel
Oh well, it just seems the comp.arch group produces an abundance of
dreamers. It's like a Beatnik Speakeasy for chip geeks. It's like the
technological equivalent of artsies. All of the "Alpha coulda ruled the
world types" seem to hang out there.
Along with the (transputer | iAPX-432 | TMS9900) coulda ruled the world |
types. I only mention TMS9900 because even though it had memory mapped
registers, to a programmer it looked real good compared to the 8088 ISA.
You can substitute your favorite failed obscure processor there.
--
Joe Seigh
When you get lemons, you make lemonade.
When you get hardware, you make software. |
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Del Cecchi
Guest
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| Posted:
Sun Sep 25, 2005 4:15 pm Post subject:
Re: Intel strikes back with a parallel x86 design |
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"YKhan" <yjkhan@gmail.com> wrote in message
news:1127656888.136448.11830@g44g2000cwa.googlegroups.com...
| Quote: | Del Cecchi wrote:
"Yousuf Khan" <bbbl67@ezrs.com> wrote in message
news:Rs-dnT5tkf3jQajeRVn-uA@rogers.com...
Jim Brooks wrote:
My ideas for a parallel x86:
- thread quantums
snip
You're from the comp.arch group aren't you?
doesn't ring any bells from comp.arch
Has only a few posts on groups.google.com search, my guess is
comp.sys.intel
Oh well, it just seems the comp.arch group produces an abundance of
dreamers. It's like a Beatnik Speakeasy for chip geeks. It's like the
technological equivalent of artsies. All of the "Alpha coulda ruled the
world types" seem to hang out there.
Yousuf Khan
|
Along with a few hard headed circuit designers..... and some highly
qualified and knowledgable folks who have btdt.
del
> |
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YKhan
Guest
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| Posted:
Sun Sep 25, 2005 4:15 pm Post subject:
Re: Intel strikes back with a parallel x86 design |
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Del Cecchi wrote:
| Quote: | "Yousuf Khan" <bbbl67@ezrs.com> wrote in message
news:Rs-dnT5tkf3jQajeRVn-uA@rogers.com...
Jim Brooks wrote:
My ideas for a parallel x86:
- thread quantums
snip
You're from the comp.arch group aren't you?
doesn't ring any bells from comp.arch
Has only a few posts on groups.google.com search, my guess is
comp.sys.intel
|
Oh well, it just seems the comp.arch group produces an abundance of
dreamers. It's like a Beatnik Speakeasy for chip geeks. It's like the
technological equivalent of artsies. All of the "Alpha coulda ruled the
world types" seem to hang out there.
Yousuf Khan |
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Klaus Fehrle
Guest
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| Posted:
Sun Sep 25, 2005 10:26 pm Post subject:
Re: Intel strikes back with a parallel x86 design |
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Nick Maclaren schrieb:
| Quote: |
Frankly, I can't see ANY technology helping much while we insist
on designing hardware to cater to the ghastlier serial codes.
Which again raises the question to what extent serial codes are ghastly |
and to what extent the underlying problems are ghastly serial. ;)
K. |
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Nick Maclaren
Guest
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| Posted:
Sun Sep 25, 2005 11:00 pm Post subject:
Re: Intel strikes back with a parallel x86 design |
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In article <dh6mm7$s17$03$1@news.t-online.com>,
Klaus Fehrle <FirstnameLastname@t-online.de> wrote:
| Quote: | Nick Maclaren schrieb:
Frankly, I can't see ANY technology helping much while we insist
on designing hardware to cater to the ghastlier serial codes.
Which again raises the question to what extent serial codes are ghastly
and to what extent the underlying problems are ghastly serial. ;)
|
Very true. But those of us who have looked at the issue tend to
agree on the following:
Most codes are both ghastly and unnecessarily serial, and some
manage to combine both in a way that is so disgusting that the
English language includes no expressions foul enough to describe
them[*].
Very few of the problems are inherently serial, but there are
some where parallelisation may be infeasible, and enabling good
parallelisation often involves changing specifications.
[*] If anyone thinks that I am referring to GUIs, such as the X
Windowing System and Microsoft's related one, I am.
Regards,
Nick Maclaren. |
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