Burst I/O on PPC440GP External Bus
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Burst I/O on PPC440GP External Bus

 
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Posted: Thu Oct 06, 2005 8:15 am    Post subject: Burst I/O on PPC440GP External Bus Reply with quote

I am trying to perform I/O with a device attached to the external
peripheral bus on a PPC440GP embedded processor. I am able to address
the device and read and write to it, but I am only able to do non-burst
I/O. Do I need to do something special to enable burst transactions?
I've programmed the EBC0_B5CR and EBC0_B5AP device control registers
appropriately to enable burst mode, but the transactions are still
single I/O.

Do I need to use PPC-specific instructions to perform burst I/O, or
should an ordinary programmed I/O (using 32-bit write operations) be
automatically queued up and converted to burst transactions?

I read something that suggested that I might need to enable caching on
that address space. Does that make sense? How would I do this from a
Linux kernel driver?

Thanks.

Gregg
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