Vector, Signal and Image Processing Library
CASTalk.com Forum Index CASTalk.com
Discussion of DSP, FPGA, storage and embedded system.
 
 FAQFAQ   MemberlistMemberlist     RegisterRegister 
 ProfileProfile   Log in to check your private messagesLog in to check your private messages   Log inLog in 
 
Google
 
Web castalk.com
Vector, Signal and Image Processing Library

 
Post new topic   Reply to topic    CASTalk.com Forum Index -> Computer Architecture
Author Message
Robin Bruce
Guest





Posted: Mon Oct 10, 2005 2:19 pm    Post subject: Vector, Signal and Image Processing Library Reply with quote

Is anyone here doing anything to do with VSIPL?

I've been working on a VSIPL project for a few months now, looking at
developing a commercial implementation. I've been looking mostly at the
system design issues and the hardware specifics. I reckoned it was
maybe about time to take another look at the motivations and I'm trying
to get more of a feel for what's happening with this standard at this
point in time.

If you go looking on the internet for what people think of VSIPL, you
don't hit on a lot of stuff. There are a good few discussions from a
couple of years ago talking about VSIPL as something that never
happened. Another failed standard.

However, interest in the standard seems to be growing again. My project
for example, and this appeared in september:

http://www.dna-cs.com/pdf/datasheet_vsipl.pdf

At the MAPLD conference in Washington in September I spoke to a number
of people in industry who were very interested in VSIPL, senior
scientists at the Air Force Research Laboratory for example. I
understand that Lockheed Martin have also shown a strong interest in
VSIPL implementation development.

Any thoughts?

Reply
Back to top
Emery Davis
Guest





Posted: Mon Oct 10, 2005 9:53 pm    Post subject: Re: Vector, Signal and Image Processing Library Reply with quote

On 10 Oct 2005 02:19:44 -0700
"Robin Bruce" <robin.bruce@gmail.com> wrote:

] Is anyone here doing anything to do with VSIPL?
]
[]
] At the MAPLD conference in Washington in September I spoke to a number
] of people in industry who were very interested in VSIPL, senior
] scientists at the Air Force Research Laboratory for example. I
] understand that Lockheed Martin have also shown a strong interest in
] VSIPL implementation development.
]

Hi Robin,

I believe the major interest behind vsipl has always been military.
As you point out LM is a driving force and also IIRC Mitre. I don't
think the interest extends much outside the domain of those doing
very long term multi-tranche developments that might experience
several HW generations. My .02€.

There are some disadvantages to vsipl when compared to SAL or
SML, in that things like stride and length are hidden in vector descriptors
(going from old memories) so that the compiler can't get at them at compile
time. At Sky we were able to do significant vectorizing optimizations,
like chaining or more trivially eliminating rt checks on stride (which actually
has a big bench effect as vectors get short) in SML that vsipl was
unable to benefit from.

HTH

-E

xpost removed.
--
Emery Davis
You can reply to ibmemeryamazon@ebayadelkadell.applecom
by removing the well known companies
Back to top
Randy
Guest





Posted: Tue Oct 11, 2005 8:15 am    Post subject: Re: Vector, Signal and Image Processing Library Reply with quote

[ comp.arch.fpga xpost removed ]

You might also ask in comp.dsp and sci.image.processing. Those folks
may have some idea of market demand for VSIPL. Or VSIPL++.

All mention I've seen of VSIPL/VSIPL++ was within the US military. I
think the DoD wants an open source toolkit that they can embed in
devices as well in future GOTS prototypes.

BTW, several versions of VSIPL++ are already being implemented, by
Code Sourcery (phase II SBIR & commercial) and Coherent Logix (phase
II SBIR).

Code Sourcery's FAQ on their open source and commercial versions of
VSIPL/VSIPL++:

http://www.codesourcery.com/vsiplplusplus/faq.html

Coherent Logix's project:
"
Abstract: Coherent Logix, Incorporated (CLX) proposes to develop a
self-optimizing parallel implementation of the VSIPL++ specification.
This implementation will include a configuration tool that
automatically extracts critical performance parameters from the target
system and a template-metaprogrammed C++ implementation that
automatically tunes the VSIPL++ software based upon the values of
these parameters. This combination will enable both highly-efficient
and highly-portable implementations of VSIPL++. During Phase I of the
program, CLX will target a subset of the standard, provide a prototype
implementation for this subset and will evaluate the appropriate
parallel performance models and metrics to be used in a complete
implementation. Phase II will include a full implementation and
supplemental tools to further enhance the performance of Signal and
Image Processing (SIP) applications.
"

http://www.coherentlogix.com
http://www.dodsbir.net/awardlist/abs032/osdabs032.htm

Randy


Robin Bruce wrote:
Quote:
Is anyone here doing anything to do with VSIPL?

I've been working on a VSIPL project for a few months now, looking at
developing a commercial implementation. I've been looking mostly at the
system design issues and the hardware specifics. I reckoned it was
maybe about time to take another look at the motivations and I'm trying
to get more of a feel for what's happening with this standard at this
point in time.

If you go looking on the internet for what people think of VSIPL, you
don't hit on a lot of stuff. There are a good few discussions from a
couple of years ago talking about VSIPL as something that never
happened. Another failed standard.

However, interest in the standard seems to be growing again. My project
for example, and this appeared in september:

http://www.dna-cs.com/pdf/datasheet_vsipl.pdf

At the MAPLD conference in Washington in September I spoke to a number
of people in industry who were very interested in VSIPL, senior
scientists at the Air Force Research Laboratory for example. I
understand that Lockheed Martin have also shown a strong interest in
VSIPL implementation development.

Any thoughts?

Reply

--
Randy Crawford http://www.ruf.rice.edu/~rand rand AT rice DOT edu
Back to top
 
Post new topic   Reply to topic    CASTalk.com Forum Index -> Computer Architecture All times are GMT
Page 1 of 1

 
You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot vote in polls in this forum




VoIP Electronics Powered by phpBB