| Author |
Message |
Del Cecchi
Guest
|
 Posted:
Mon Oct 10, 2005 4:15 pm Post subject:
Power5 and Cell, new issue of IBM Journal of R&D |
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|
A double issue with several power 5 articles and a cell article as well
as a section on advanced packaging.
http://www.research.ibm.com/journal/rd49-45.html
--
Del Cecchi
"This post is my own and doesn’t necessarily represent IBM’s positions,
strategies or opinions.” |
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Niels Jørgen Kruse
Guest
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| Posted:
Mon Oct 10, 2005 10:00 pm Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
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Del Cecchi <cecchinospam@us.ibm.com> wrote:
| Quote: | http://www.research.ibm.com/journal/rd49-45.html
|
It has been out for a couple of months now.
The article named "Operating system exploitation of the POWER5 system"
seems to have information on the mysterious "fastpath" improvements
(unless there is still something left in secret).
Main improvements are
- coherent i-cache
- DMA engine for copying pages around
- parallel TLB entry invalidation
BTW, the POWER5+ double the number of TLB entries to 2K.
--
Mvh./Regards, Niels Jørgen Kruse, Vanløse, Denmark |
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Oliver S.
Guest
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| Posted:
Tue Oct 11, 2005 2:31 pm Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
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| Quote: | - coherent i-cache
|
I don't believe that this really improves the performance to a degree
which is worth to be mentioned.
| Quote: | BTW, the POWER5+ double the number of TLB entries to 2K.
|
I'd like to have an architecture with dedicated address-registers like the
good old 68000. With such an architecute, TLBing would be extremely fast if
there would be a single TLB-entry associated which each address -register in
adition to the TLB-caches. Maybe that would lower the latency of a load by
one or two clock-cycles. |
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Eric P.
Guest
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| Posted:
Tue Oct 11, 2005 4:15 pm Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
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"Oliver S." wrote:
| Quote: |
BTW, the POWER5+ double the number of TLB entries to 2K.
I'd like to have an architecture with dedicated address-registers like the
good old 68000. With such an architecute, TLBing would be extremely fast if
there would be a single TLB-entry associated which each address -register in
adition to the TLB-caches. Maybe that would lower the latency of a load by
one or two clock-cycles.
|
I haven't looked at the POWER5+, but previous PowerPC had a thing called
BAT registers for Block Address Translation. It is intended for use with
instructions and data memory not normally managed as virtual pages
(non paging kernel or graphics memory).
The BAT registers (4 I, 4 D) define address ranges from 128KB to 256MB
block sizes that are picked off and routed directly to physical memory
bypassing the TLB.
I don't see that it would necessarily be any faster translation though.
Eric |
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Keith R. Williams
Guest
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| Posted:
Tue Oct 11, 2005 4:15 pm Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
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|
In article <434BD607.3529974F@sympaticoREMOVE.ca>,
eric_pattison@sympaticoREMOVE.ca says...
| Quote: | "Oliver S." wrote:
BTW, the POWER5+ double the number of TLB entries to 2K.
I'd like to have an architecture with dedicated address-registers like the
good old 68000. With such an architecute, TLBing would be extremely fast if
there would be a single TLB-entry associated which each address -register in
adition to the TLB-caches. Maybe that would lower the latency of a load by
one or two clock-cycles.
I haven't looked at the POWER5+, but previous PowerPC had a thing called
BAT registers for Block Address Translation. It is intended for use with
instructions and data memory not normally managed as virtual pages
(non paging kernel or graphics memory).
|
The BAT registers went missing with the Power4 and 970.
--
Keith |
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Eric P.
Guest
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| Posted:
Tue Oct 11, 2005 4:15 pm Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
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|
"Eric P." wrote:
| Quote: |
"Oliver S." wrote:
BTW, the POWER5+ double the number of TLB entries to 2K.
I'd like to have an architecture with dedicated address-registers like the
good old 68000. With such an architecute, TLBing would be extremely fast if
there would be a single TLB-entry associated which each address -register in
adition to the TLB-caches. Maybe that would lower the latency of a load by
one or two clock-cycles.
I haven't looked at the POWER5+, but previous PowerPC had a thing called
BAT registers for Block Address Translation. It is intended for use with
instructions and data memory not normally managed as virtual pages
(non paging kernel or graphics memory).
The BAT registers (4 I, 4 D) define address ranges from 128KB to 256MB
block sizes that are picked off and routed directly to physical memory
bypassing the TLB.
|
A similar result can be accomplished with a TLB with variable page
size and some number of optionally lockable entries.
Eric |
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Sander Vesik
Guest
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| Posted:
Tue Oct 18, 2005 9:05 pm Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
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|
Keith R. Williams <krw@att.bizzzz> wrote:
| Quote: |
The BAT registers went missing with the Power4 and 970.
|
That is a rather large architecture level breakage though. At
some point IBM will slap a "PowerPC" monkier on something
totaly alien...
--
Sander
+++ Out of cheese error +++ |
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Maynard Handley
Guest
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| Posted:
Wed Oct 19, 2005 6:01 am Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
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|
In article <1129669536.751266@haldjas.folklore.ee>,
Sander Vesik <sander@haldjas.folklore.ee> wrote:
| Quote: | Keith R. Williams <krw@att.bizzzz> wrote:
The BAT registers went missing with the Power4 and 970.
That is a rather large architecture level breakage though. At
some point IBM will slap a "PowerPC" monkier on something
totaly alien...
--
Sander
+++ Out of cheese error +++
|
If a tree falls in a forest and no-one hears it, did it happen?
It's only a "rather large architecture level breakage" in the practical
sense if anyone gives a damn? MacOS (for better or worse) did not use
BATs, even for some obvious and easy cases like covering VRAM (data) and
OS code (instructions). I've never heard of Linux using them, presumably
because they want to keep the VM system as common as possible across
architectures. I assume both AIX and OS/400 or p/OS or whatever it's
called these days either didn't care or found the 16MB pages a better
replacement, otherwise the BATs would presumably still be there.
So who's left? I guess some RTOSs, and they are presumably the kind of
client who would use them, but that's not the POWER4/970 target market,
and it's not clear, given the way IBM has handled the 970 that it's a
market IBM has any interest in.
More interesting, IMHO, is the way IBM seems to be making no effort
whatsoever to move virtualization support into the PPC architecture.
That, more than anything else, I take to mean PPC is dead as a concept.
IBM will support POWER (of course) and will support the PPC instruction
set in various strange places like Cell, but the idea of an
industry-wide architecture that's bigger than IBM is no longer of
interest to them.
Maynard |
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Del Cecchi
Guest
|
| Posted:
Wed Oct 19, 2005 6:51 am Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
|
|
"Maynard Handley" <name99@name99.org> wrote in message
news:name99-D6D994.18013118102005@localhost...
| Quote: | In article <1129669536.751266@haldjas.folklore.ee>,
Sander Vesik <sander@haldjas.folklore.ee> wrote:
Keith R. Williams <krw@att.bizzzz> wrote:
The BAT registers went missing with the Power4 and 970.
That is a rather large architecture level breakage though. At
some point IBM will slap a "PowerPC" monkier on something
totaly alien...
--
Sander
+++ Out of cheese error +++
If a tree falls in a forest and no-one hears it, did it happen?
It's only a "rather large architecture level breakage" in the practical
sense if anyone gives a damn? MacOS (for better or worse) did not use
BATs, even for some obvious and easy cases like covering VRAM (data)
and
OS code (instructions). I've never heard of Linux using them,
presumably
because they want to keep the VM system as common as possible across
architectures. I assume both AIX and OS/400 or p/OS or whatever it's
called these days either didn't care or found the 16MB pages a better
replacement, otherwise the BATs would presumably still be there.
So who's left? I guess some RTOSs, and they are presumably the kind of
client who would use them, but that's not the POWER4/970 target market,
and it's not clear, given the way IBM has handled the 970 that it's a
market IBM has any interest in.
More interesting, IMHO, is the way IBM seems to be making no effort
whatsoever to move virtualization support into the PPC architecture.
That, more than anything else, I take to mean PPC is dead as a concept.
IBM will support POWER (of course) and will support the PPC instruction
set in various strange places like Cell, but the idea of an
industry-wide architecture that's bigger than IBM is no longer of
interest to them.
Maynard
|
Are you saying that the ip series aren't powerpc? They most certainly
are even though they don't say it in the name
And here is virtualization stuff
http://www-1.ibm.com/press/PressServletForm.wss?MenuChoice=pressreleases&TemplateName=ShowPressReleaseTemplate&SelectString=t1.docunid=7925&TableName=DataheadApplicationClass&SESSIONKEY=any&WindowTitle=Press+Release&STATUS=publish
(sorry about the long link. It is an october 10 press release on
ibm.com)
and here is another one that discusses power.org and shows the use of
power and powerpc in an interchangeable way
http://www-1.ibm.com/press/PressServletForm.wss?MenuChoice=pressreleases&TemplateName=ShowPressReleaseTemplate&SelectString=t1.docunid=7907&TableName=DataheadApplicationClass&SESSIONKEY=any&WindowTitle=Press+Release&STATUS=publish |
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Keith R. Williams
Guest
|
| Posted:
Wed Oct 19, 2005 4:15 pm Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
|
|
In article <name99-D6D994.18013118102005@localhost>, name99
@name99.org says...
| Quote: | In article <1129669536.751266@haldjas.folklore.ee>,
Sander Vesik <sander@haldjas.folklore.ee> wrote:
Keith R. Williams <krw@att.bizzzz> wrote:
The BAT registers went missing with the Power4 and 970.
That is a rather large architecture level breakage though. At
some point IBM will slap a "PowerPC" monkier on something
totaly alien...
--
Sander
+++ Out of cheese error +++
If a tree falls in a forest and no-one hears it, did it happen?
It's only a "rather large architecture level breakage" in the practical
sense if anyone gives a damn? MacOS (for better or worse) did not use
BATs, even for some obvious and easy cases like covering VRAM (data) and
OS code (instructions). I've never heard of Linux using them, presumably
because they want to keep the VM system as common as possible across
architectures. I assume both AIX and OS/400 or p/OS or whatever it's
called these days either didn't care or found the 16MB pages a better
replacement, otherwise the BATs would presumably still be there.
So who's left? I guess some RTOSs, and they are presumably the kind of
client who would use them, but that's not the POWER4/970 target market,
and it's not clear, given the way IBM has handled the 970 that it's a
market IBM has any interest in.
|
Pretty much. BATs weren't used in the target market, so were an
anchor.
| Quote: | More interesting, IMHO, is the way IBM seems to be making no effort
whatsoever to move virtualization support into the PPC architecture.
That, more than anything else, I take to mean PPC is dead as a concept.
IBM will support POWER (of course) and will support the PPC instruction
set in various strange places like Cell, but the idea of an
industry-wide architecture that's bigger than IBM is no longer of
interest to them.
|
I'm not sure what you mean by "no effort whatsoever to move
virualization support..". Power4 and the blade version of the 970
have "hypervisor mode", which is exactly that.
--
Keith |
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|
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Del Cecchi
Guest
|
| Posted:
Wed Oct 19, 2005 9:15 pm Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
|
|
Keith R. Williams wrote:
| Quote: | In article <name99-D6D994.18013118102005@localhost>, name99
@name99.org says...
In article <1129669536.751266@haldjas.folklore.ee>,
Sander Vesik <sander@haldjas.folklore.ee> wrote:
Keith R. Williams <krw@att.bizzzz> wrote:
The BAT registers went missing with the Power4 and 970.
That is a rather large architecture level breakage though. At
some point IBM will slap a "PowerPC" monkier on something
totaly alien...
--
Sander
+++ Out of cheese error +++
If a tree falls in a forest and no-one hears it, did it happen?
It's only a "rather large architecture level breakage" in the practical
sense if anyone gives a damn? MacOS (for better or worse) did not use
BATs, even for some obvious and easy cases like covering VRAM (data) and
OS code (instructions). I've never heard of Linux using them, presumably
because they want to keep the VM system as common as possible across
architectures. I assume both AIX and OS/400 or p/OS or whatever it's
called these days either didn't care or found the 16MB pages a better
replacement, otherwise the BATs would presumably still be there.
So who's left? I guess some RTOSs, and they are presumably the kind of
client who would use them, but that's not the POWER4/970 target market,
and it's not clear, given the way IBM has handled the 970 that it's a
market IBM has any interest in.
Pretty much. BATs weren't used in the target market, so were an
anchor.
More interesting, IMHO, is the way IBM seems to be making no effort
whatsoever to move virtualization support into the PPC architecture.
That, more than anything else, I take to mean PPC is dead as a concept.
IBM will support POWER (of course) and will support the PPC instruction
set in various strange places like Cell, but the idea of an
industry-wide architecture that's bigger than IBM is no longer of
interest to them.
I'm not sure what you mean by "no effort whatsoever to move
virualization support..". Power4 and the blade version of the 970
have "hypervisor mode", which is exactly that.
It seems as if maynard thinks a power4 or a 970 or a P5 is somehow a |
Power but not a POWERPC. I don't know why he thinks that, if he does.
I posted a link about the virtualization support above.
del
--
Del Cecchi
"This post is my own and doesn’t necessarily represent IBM’s positions,
strategies or opinions.” |
|
| Back to top |
|
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Keith R. Williams
Guest
|
| Posted:
Wed Oct 19, 2005 9:29 pm Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
|
|
In article <3rn9pvFkbojqU1@individual.net>, cecchinospam@us.ibm.com
says...
| Quote: | Keith R. Williams wrote:
In article <name99-D6D994.18013118102005@localhost>, name99
@name99.org says...
In article <1129669536.751266@haldjas.folklore.ee>,
Sander Vesik <sander@haldjas.folklore.ee> wrote:
Keith R. Williams <krw@att.bizzzz> wrote:
The BAT registers went missing with the Power4 and 970.
That is a rather large architecture level breakage though. At
some point IBM will slap a "PowerPC" monkier on something
totaly alien...
--
Sander
+++ Out of cheese error +++
If a tree falls in a forest and no-one hears it, did it happen?
It's only a "rather large architecture level breakage" in the practical
sense if anyone gives a damn? MacOS (for better or worse) did not use
BATs, even for some obvious and easy cases like covering VRAM (data) and
OS code (instructions). I've never heard of Linux using them, presumably
because they want to keep the VM system as common as possible across
architectures. I assume both AIX and OS/400 or p/OS or whatever it's
called these days either didn't care or found the 16MB pages a better
replacement, otherwise the BATs would presumably still be there.
So who's left? I guess some RTOSs, and they are presumably the kind of
client who would use them, but that's not the POWER4/970 target market,
and it's not clear, given the way IBM has handled the 970 that it's a
market IBM has any interest in.
Pretty much. BATs weren't used in the target market, so were an
anchor.
More interesting, IMHO, is the way IBM seems to be making no effort
whatsoever to move virtualization support into the PPC architecture.
That, more than anything else, I take to mean PPC is dead as a concept.
IBM will support POWER (of course) and will support the PPC instruction
set in various strange places like Cell, but the idea of an
industry-wide architecture that's bigger than IBM is no longer of
interest to them.
I'm not sure what you mean by "no effort whatsoever to move
virualization support..". Power4 and the blade version of the 970
have "hypervisor mode", which is exactly that.
It seems as if maynard thinks a power4 or a 970 or a P5 is somehow a
Power but not a POWERPC. I don't know why he thinks that, if he does.
|
POWER is now a marketing term, rather than an architecture. The
architecture is PowerPC/AS.
| Quote: | I posted a link about the virtualization support above.
|
I see that.
--
Keith |
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David Hopwood
Guest
|
| Posted:
Wed Oct 19, 2005 10:46 pm Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
|
|
Maynard Handley wrote:
| Quote: | More interesting, IMHO, is the way IBM seems to be making no effort
whatsoever to move virtualization support into the PPC architecture.
That, more than anything else, I take to mean PPC is dead as a concept.
|
That's quite funny. Google "PowerPC virtualization" or "pSeries".
--
David Hopwood <david.nospam.hopwood@blueyonder.co.uk> |
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Maynard Handley
Guest
|
| Posted:
Thu Oct 20, 2005 12:15 am Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
|
|
In article <3rln5kFk7l1cU1@individual.net>,
"Del Cecchi" <dcecchi.nospam@att.net> wrote:
| Quote: | "Maynard Handley" <name99@name99.org> wrote in message
news:name99-D6D994.18013118102005@localhost...
In article <1129669536.751266@haldjas.folklore.ee>,
Sander Vesik <sander@haldjas.folklore.ee> wrote:
Keith R. Williams <krw@att.bizzzz> wrote:
The BAT registers went missing with the Power4 and 970.
That is a rather large architecture level breakage though. At
some point IBM will slap a "PowerPC" monkier on something
totaly alien...
--
Sander
+++ Out of cheese error +++
If a tree falls in a forest and no-one hears it, did it happen?
It's only a "rather large architecture level breakage" in the practical
sense if anyone gives a damn? MacOS (for better or worse) did not use
BATs, even for some obvious and easy cases like covering VRAM (data)
and
OS code (instructions). I've never heard of Linux using them,
presumably
because they want to keep the VM system as common as possible across
architectures. I assume both AIX and OS/400 or p/OS or whatever it's
called these days either didn't care or found the 16MB pages a better
replacement, otherwise the BATs would presumably still be there.
So who's left? I guess some RTOSs, and they are presumably the kind of
client who would use them, but that's not the POWER4/970 target market,
and it's not clear, given the way IBM has handled the 970 that it's a
market IBM has any interest in.
More interesting, IMHO, is the way IBM seems to be making no effort
whatsoever to move virtualization support into the PPC architecture.
That, more than anything else, I take to mean PPC is dead as a concept.
IBM will support POWER (of course) and will support the PPC instruction
set in various strange places like Cell, but the idea of an
industry-wide architecture that's bigger than IBM is no longer of
interest to them.
Maynard
Are you saying that the ip series aren't powerpc? They most certainly
are even though they don't say it in the name
And here is virtualization stuff
http://www-1.ibm.com/press/PressServletForm.wss?MenuChoice=pressreleases&Templ
ateName=ShowPressReleaseTemplate&SelectString=t1.docunid=7925&TableName=Datahe
adApplicationClass&SESSIONKEY=any&WindowTitle=Press+Release&STATUS=publish
(sorry about the long link. It is an october 10 press release on
ibm.com)
and here is another one that discusses power.org and shows the use of
power and powerpc in an interchangeable way
http://www-1.ibm.com/press/PressServletForm.wss?MenuChoice=pressreleases&Templ
ateName=ShowPressReleaseTemplate&SelectString=t1.docunid=7907&TableName=Datahe
adApplicationClass&SESSIONKEY=any&WindowTitle=Press+Release&STATUS=publish
|
Dammit, people, I'm not an idiot. In case people are still missing the
point, let's spell it out in baby steps:
+ PPC *architecture* is not the collection of chips that IBM and
Freescale are currently shipping. It is a formal document, theoretically
under the control of a non-IBM body, that describes what a "PPC"
architected chip looks like to software
+ IBM has added substantial virtualization support to its POWER4 and
POWER5 chips (and to 970, though their status there is kinda weird, not
clear if they are officially supported as opposed to just came along for
the ride as pieces were hacked off the POWER4 to make the 970)
+ IBM has (as far as I can tell) made no effort whatsoever to move this
virtualization support into the PPC architectural spec. Beyond that,
they appear completely uninterested in even letting people know details
about it. Everything public I have seen from them discusses what the
support provides, but not the low-level tech details you'd need to code
to it or to create a chip supporting it. I've no idea how their Linux
support handles this, but it wouldn't surprise me if they've added to
the kernel the appropriate h-calls in various places with no information
about how one might write the hypervisor on which this para-virtualized
LinuxPPC would run. |
|
| Back to top |
|
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Maynard Handley
Guest
|
| Posted:
Thu Oct 20, 2005 12:15 am Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
|
|
In article <MPG.1dc027ab3e585617989c48@news.individual.net>,
Keith R. Williams <krw@att.bizzzz> wrote:
| Quote: | In article <name99-D6D994.18013118102005@localhost>, name99
@name99.org says...
In article <1129669536.751266@haldjas.folklore.ee>,
Sander Vesik <sander@haldjas.folklore.ee> wrote:
Keith R. Williams <krw@att.bizzzz> wrote:
The BAT registers went missing with the Power4 and 970.
That is a rather large architecture level breakage though. At
some point IBM will slap a "PowerPC" monkier on something
totaly alien...
--
Sander
+++ Out of cheese error +++
If a tree falls in a forest and no-one hears it, did it happen?
It's only a "rather large architecture level breakage" in the practical
sense if anyone gives a damn? MacOS (for better or worse) did not use
BATs, even for some obvious and easy cases like covering VRAM (data) and
OS code (instructions). I've never heard of Linux using them, presumably
because they want to keep the VM system as common as possible across
architectures. I assume both AIX and OS/400 or p/OS or whatever it's
called these days either didn't care or found the 16MB pages a better
replacement, otherwise the BATs would presumably still be there.
So who's left? I guess some RTOSs, and they are presumably the kind of
client who would use them, but that's not the POWER4/970 target market,
and it's not clear, given the way IBM has handled the 970 that it's a
market IBM has any interest in.
Pretty much. BATs weren't used in the target market, so were an
anchor.
More interesting, IMHO, is the way IBM seems to be making no effort
whatsoever to move virtualization support into the PPC architecture.
That, more than anything else, I take to mean PPC is dead as a concept.
IBM will support POWER (of course) and will support the PPC instruction
set in various strange places like Cell, but the idea of an
industry-wide architecture that's bigger than IBM is no longer of
interest to them.
I'm not sure what you mean by "no effort whatsoever to move
virualization support..". Power4 and the blade version of the 970
have "hypervisor mode", which is exactly that.
|
You miss my point. Yes IBM's chips have (substantial) virtualization
support. But, and this is my point, they are not making that part of the
formal (IBM-indepent) PPC architecture. |
|
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