| Author |
Message |
Del Cecchi
Guest
|
 Posted:
Thu Oct 20, 2005 6:27 am Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
|
|
"Maynard Handley" <name99@name99.org> wrote in message
news:name99-B3F192.15335119102005@localhost...
| Quote: | In article <3rln5kFk7l1cU1@individual.net>,
"Del Cecchi" <dcecchi.nospam@att.net> wrote:
"Maynard Handley" <name99@name99.org> wrote in message
news:name99-D6D994.18013118102005@localhost...
In article <1129669536.751266@haldjas.folklore.ee>,
Sander Vesik <sander@haldjas.folklore.ee> wrote:
Keith R. Williams <krw@att.bizzzz> wrote:
The BAT registers went missing with the Power4 and 970.
That is a rather large architecture level breakage though. At
some point IBM will slap a "PowerPC" monkier on something
totaly alien...
--
Sander
+++ Out of cheese error +++
If a tree falls in a forest and no-one hears it, did it happen?
It's only a "rather large architecture level breakage" in the
practical
sense if anyone gives a damn? MacOS (for better or worse) did not
use
BATs, even for some obvious and easy cases like covering VRAM (data)
and
OS code (instructions). I've never heard of Linux using them,
presumably
because they want to keep the VM system as common as possible across
architectures. I assume both AIX and OS/400 or p/OS or whatever it's
called these days either didn't care or found the 16MB pages a
better
replacement, otherwise the BATs would presumably still be there.
So who's left? I guess some RTOSs, and they are presumably the kind
of
client who would use them, but that's not the POWER4/970 target
market,
and it's not clear, given the way IBM has handled the 970 that it's
a
market IBM has any interest in.
More interesting, IMHO, is the way IBM seems to be making no effort
whatsoever to move virtualization support into the PPC architecture.
That, more than anything else, I take to mean PPC is dead as a
concept.
IBM will support POWER (of course) and will support the PPC
instruction
set in various strange places like Cell, but the idea of an
industry-wide architecture that's bigger than IBM is no longer of
interest to them.
Maynard
Are you saying that the ip series aren't powerpc? They most certainly
are even though they don't say it in the name
And here is virtualization stuff
http://www-1.ibm.com/press/PressServletForm.wss?MenuChoice=pressreleases&Templ
ateName=ShowPressReleaseTemplate&SelectString=t1.docunid=7925&TableName=Datahe
adApplicationClass&SESSIONKEY=any&WindowTitle=Press+Release&STATUS=publish
(sorry about the long link. It is an october 10 press release on
ibm.com)
and here is another one that discusses power.org and shows the use of
power and powerpc in an interchangeable way
http://www-1.ibm.com/press/PressServletForm.wss?MenuChoice=pressreleases&Templ
ateName=ShowPressReleaseTemplate&SelectString=t1.docunid=7907&TableName=Datahe
adApplicationClass&SESSIONKEY=any&WindowTitle=Press+Release&STATUS=publish
Dammit, people, I'm not an idiot. In case people are still missing the
point, let's spell it out in baby steps:
|
I was wondering what the deal was.
| Quote: | + PPC *architecture* is not the collection of chips that IBM and
Freescale are currently shipping. It is a formal document,
theoretically
under the control of a non-IBM body, that describes what a "PPC"
architected chip looks like to software
|
The document linked from power.org is
http://www-128.ibm.com/developerworks/eserver/articles/archguide.html?S_TACT=105AGX16&S_CMP=DWPA
which looks like it is still IBM's document.
| Quote: | + IBM has added substantial virtualization support to its POWER4 and
POWER5 chips (and to 970, though their status there is kinda weird, not
clear if they are officially supported as opposed to just came along
for
the ride as pieces were hacked off the POWER4 to make the 970)
+ IBM has (as far as I can tell) made no effort whatsoever to move this
virtualization support into the PPC architectural spec. Beyond that,
they appear completely uninterested in even letting people know details
about it. Everything public I have seen from them discusses what the
support provides, but not the low-level tech details you'd need to code
to it or to create a chip supporting it. I've no idea how their Linux
support handles this, but it wouldn't surprise me if they've added to
the kernel the appropriate h-calls in various places with no
information
about how one might write the hypervisor on which this para-virtualized
LinuxPPC would run.
|
Have you contacted the author of the above document and expressed your
concerns? Here is what it says on that page
Ed Silha joined IBM in Austin, Texas, as a professional hire in 1977. He
worked on manufacturing systems before joining the POWER processor
architecture group in 1986. He manages the PowerPC processor architecture
on which the microprocessors used in the IBM pSeries and iSeries systems
are based. You can contact him at silha@us.ibm.com.
So he would be someone that could tell you if or when the stuff you
are interested in will be made public, and you could let him know what
you would like to see. |
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Keith R. Williams
Guest
|
| Posted:
Thu Oct 20, 2005 4:15 pm Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
|
|
In article <name99-80FC96.15254219102005@localhost>, name99
@name99.org says...
| Quote: | In article <MPG.1dc027ab3e585617989c48@news.individual.net>,
Keith R. Williams <krw@att.bizzzz> wrote:
In article <name99-D6D994.18013118102005@localhost>, name99
@name99.org says...
|
<snip>
| Quote: | More interesting, IMHO, is the way IBM seems to be making no effort
whatsoever to move virtualization support into the PPC architecture.
That, more than anything else, I take to mean PPC is dead as a concept.
IBM will support POWER (of course) and will support the PPC instruction
set in various strange places like Cell, but the idea of an
industry-wide architecture that's bigger than IBM is no longer of
interest to them.
I'm not sure what you mean by "no effort whatsoever to move
virualization support..". Power4 and the blade version of the 970
have "hypervisor mode", which is exactly that.
You miss my point.
|
Yes indeed, which is why I added the "not sure" part to my
response. I thought there was something missing there. ;-)
| Quote: | Yes IBM's chips have (substantial) virtualization
support. But, and this is my point, they are not making that part of the
formal (IBM-indepent) PPC architecture.
|
As I see it, there are (at least) two distinct branches of the PPC
line. The workstation/server lines have virtualization support (and
no BATs). HV is really a processor dependent (Book 4) thing and
the "PowerPC architecture" really runs "under" the HV layer on
these processors. Since these processors tend to come in IBM
equipment, with an IBM hypervisor/OS, they don't include the under-
the-covers detail of the HV layer. I have no idea if that'll
change.
The second "branch" is the embedded space. AFAIK, this is where
the "IBM-independent" PPC architecture program is headed. HV isn't
likely to penetrate into this space and BATs are quite likely to
remain.
--
Keith
(not smart enough to speak for IBM or PowerPC processor
development) |
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Maynard Handley
Guest
|
| Posted:
Fri Oct 21, 2005 12:15 am Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
|
|
In article <MPG.1dc17e9f668dc38f989c59@news.individual.net>,
Keith R. Williams <krw@att.bizzzz> wrote:
| Quote: | In article <name99-80FC96.15254219102005@localhost>, name99
@name99.org says...
In article <MPG.1dc027ab3e585617989c48@news.individual.net>,
Keith R. Williams <krw@att.bizzzz> wrote:
In article <name99-D6D994.18013118102005@localhost>, name99
@name99.org says...
snip
More interesting, IMHO, is the way IBM seems to be making no effort
whatsoever to move virtualization support into the PPC architecture.
That, more than anything else, I take to mean PPC is dead as a concept.
IBM will support POWER (of course) and will support the PPC instruction
set in various strange places like Cell, but the idea of an
industry-wide architecture that's bigger than IBM is no longer of
interest to them.
I'm not sure what you mean by "no effort whatsoever to move
virualization support..". Power4 and the blade version of the 970
have "hypervisor mode", which is exactly that.
You miss my point.
Yes indeed, which is why I added the "not sure" part to my
response. I thought there was something missing there. ;-)
Yes IBM's chips have (substantial) virtualization
support. But, and this is my point, they are not making that part of the
formal (IBM-indepent) PPC architecture.
As I see it, there are (at least) two distinct branches of the PPC
line. The workstation/server lines have virtualization support (and
no BATs). HV is really a processor dependent (Book 4) thing and
the "PowerPC architecture" really runs "under" the HV layer on
these processors. Since these processors tend to come in IBM
equipment, with an IBM hypervisor/OS, they don't include the under-
the-covers detail of the HV layer. I have no idea if that'll
change.
|
One of the IBM journal article on POWER5 claims that you *cannot* write
an OS to the "PPC" layer of POWER5. A hypervisor has to be running and
you have to write to the hypervisor. That was what occasioned my point
in the first place. OK, so now you can split ever finer hairs about how
the user code remains the same, but this is not a legalisms issue, it is
a politics issue. Go back to my point --- if IBM's flagship PPC product
won't run an unmodified version of PPC Linux, then PPC as a concept is
dead outside the embedded space. |
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Jason Ozolins
Guest
|
| Posted:
Fri Oct 21, 2005 7:37 am Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
|
|
Maynard Handley wrote:
| Quote: | One of the IBM journal article on POWER5 claims that you *cannot* write
an OS to the "PPC" layer of POWER5. A hypervisor has to be running and
you have to write to the hypervisor. That was what occasioned my point
in the first place. OK, so now you can split ever finer hairs about how
the user code remains the same, but this is not a legalisms issue, it is
a politics issue. Go back to my point --- if IBM's flagship PPC product
won't run an unmodified version of PPC Linux, then PPC as a concept is
dead outside the embedded space.
|
The author of that article should have attended a presentation at
linux.conf.au this year, in which Anton Blanchard from IBM's OzLabs
(http://www.ozlabs.net) talked about how porting "bare metal" Linux to an
early sample G5 processor led to faster system bringup and fault finding than
a hypervisor approach would have yielded, based on previous experiences.
Fairly candid stuff.
-Jason =:^) |
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John F. Carr
Guest
|
| Posted:
Fri Oct 21, 2005 4:15 pm Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
|
|
In article <4358545d$1@clarion.carno.net.au>,
Jason Ozolins <jason_abroad@yahoo.com.au> wrote:
| Quote: | Maynard Handley wrote:
One of the IBM journal article on POWER5 claims that you *cannot* write
an OS to the "PPC" layer of POWER5. A hypervisor has to be running and
you have to write to the hypervisor. That was what occasioned my point
in the first place. OK, so now you can split ever finer hairs about how
the user code remains the same, but this is not a legalisms issue, it is
a politics issue. Go back to my point --- if IBM's flagship PPC product
won't run an unmodified version of PPC Linux, then PPC as a concept is
dead outside the embedded space.
The author of that article should have attended a presentation at
linux.conf.au this year, in which Anton Blanchard from IBM's OzLabs
(http://www.ozlabs.net) talked about how porting "bare metal" Linux to an
early sample G5 processor led to faster system bringup and fault finding than
a hypervisor approach would have yielded, based on previous experiences.
Fairly candid stuff.
|
20 years ago IBM threw two teams at the IBM RT, one of them porting
BSD Unix to the bare hardware and another porting (writing?) AIX to
run on a supervisor layer (VRM). The BSD (called AOS) was preferred
by those who could get their hands on it.
--
John Carr (jfc@mit.edu) |
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Guest
|
| Posted:
Sat Oct 22, 2005 12:15 am Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
|
|
John F. Carr wrote:
| Quote: | 20 years ago IBM threw two teams at the IBM RT, one of them porting
BSD Unix to the bare hardware and another porting (writing?) AIX to
run on a supervisor layer (VRM). The BSD (called AOS) was preferred
by those who could get their hands on it.
|
slightly more complicated ... romp was going to be the displaywriter
follow-on, used cp.r and pl.8. business analysis eventually showed
something like the smallest, entry level romp was more expensive than
the top of the displaywriter market and the project was canceled. the
group looked around and somewhat found that anybody could port unix to
their machine and call it a unix workstations. they invented the VRM
(virtual resource manager) for the pl.8 programmers to do ... and hired
the company that had done the at&t port for pc/ix to do one to the
abstract vrm interface (supposedly the justification was that would
take less work than doing port directly to bare hardware interface).
in the mean time the acis group in palo alto were working on a bsd port
to 370. minor folklore ... i had been trying to talk one of the people
that had done pascal/vs to do a C front-end for it (for a 370 c
compiler). he disappeared one summer and showed up at metaware in santa
cruz. i suggested to the palo alto group that they could contract with
metaware for 370 c compiler. somewhere along the way, the palo alto
group got redirected to target the bsd port to the pc/rt (instead of
370 ... pc/rt was already out in the market). this became aos for the
pc/rt (and also used metaware c compiler). The palo alto group took
some pride in pointing out that aos/bsd port to pc/rt bare metal took
less effort than either the vrm implementation or the AT&T port to the
vrm interface.
there were misc. & sundry other rivalries between austin and palo alto.
austin had done journaled file system for rios/power (aix v3) using
special "database" 801 hardware ... claiming that it was more efficient
and less work than modifying the filesystem code to perform traditional
logging and commit calls. the palo alto group took the jfs code and
reworked it for a "portable" version ... didn't rely on 801 hardware
.... instead had traditional database logging and commit calls. The
benchmarked both versions on same rios/power hardware ... and the
version that didn't use the special hardware was faster. recent post on
the subject
http://www.garlic.com/~lynn/2005r.html#27 transactional memory question
misc. past 801, romp, rios, fort knox, etc collected posts
http://www.garlic.com/~lynn/subtopic.html#801 |
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Keith R. Williams
Guest
|
| Posted:
Sat Oct 22, 2005 12:15 am Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
|
|
In article <name99-8BD1C8.16075420102005@localhost>, name99
@name99.org says...
| Quote: | In article <MPG.1dc17e9f668dc38f989c59@news.individual.net>,
Keith R. Williams <krw@att.bizzzz> wrote:
In article <name99-80FC96.15254219102005@localhost>, name99
@name99.org says...
In article <MPG.1dc027ab3e585617989c48@news.individual.net>,
Keith R. Williams <krw@att.bizzzz> wrote:
In article <name99-D6D994.18013118102005@localhost>, name99
@name99.org says...
snip
More interesting, IMHO, is the way IBM seems to be making no effort
whatsoever to move virtualization support into the PPC architecture.
That, more than anything else, I take to mean PPC is dead as a concept.
IBM will support POWER (of course) and will support the PPC instruction
set in various strange places like Cell, but the idea of an
industry-wide architecture that's bigger than IBM is no longer of
interest to them.
I'm not sure what you mean by "no effort whatsoever to move
virualization support..". Power4 and the blade version of the 970
have "hypervisor mode", which is exactly that.
You miss my point.
Yes indeed, which is why I added the "not sure" part to my
response. I thought there was something missing there. ;-)
Yes IBM's chips have (substantial) virtualization
support. But, and this is my point, they are not making that part of the
formal (IBM-indepent) PPC architecture.
As I see it, there are (at least) two distinct branches of the PPC
line. The workstation/server lines have virtualization support (and
no BATs). HV is really a processor dependent (Book 4) thing and
the "PowerPC architecture" really runs "under" the HV layer on
these processors. Since these processors tend to come in IBM
equipment, with an IBM hypervisor/OS, they don't include the under-
the-covers detail of the HV layer. I have no idea if that'll
change.
One of the IBM journal article on POWER5 claims that you *cannot* write
an OS to the "PPC" layer of POWER5. A hypervisor has to be running and
you have to write to the hypervisor. That was what occasioned my point
in the first place. OK, so now you can split ever finer hairs about how
the user code remains the same, but this is not a legalisms issue, it is
a politics issue. Go back to my point --- if IBM's flagship PPC product
won't run an unmodified version of PPC Linux, then PPC as a concept is
dead outside the embedded space.
|
I really don't know what documentation on HV mode is available to
the general public, so can't comment too much further. From what I
gather, it hasn't stopped linux though. Note that Apple uses HV=1
for the OS (HV==1 for the Apple version of the 970).
--
Keith |
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Wes Felter
Guest
|
| Posted:
Sat Oct 22, 2005 7:05 am Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
|
|
On 2005-10-18 20:01:33 -0500, Maynard Handley <name99@name99.org> said:
| Quote: | More interesting, IMHO, is the way IBM seems to be making no effort
whatsoever to move virtualization support into the PPC architecture.
That, more than anything else, I take to mean PPC is dead as a concept.
IBM will support POWER (of course) and will support the PPC instruction
set in various strange places like Cell, but the idea of an
industry-wide architecture that's bigger than IBM is no longer of
interest to them.
|
Given that IBM is the only company making big PowerPCs and the
hypervisors that run on them, I can see how you'd get that impression.
But the situation is better than you think.
Book III of the PowerPC 2.02 spec describes some HV/LPAR features:
http://www-128.ibm.com/developerworks/eserver/library/es-archguide-v2.html
The PowerPC 970FX manual also mentions it:
http://www-306.ibm.com/chips/techlib/techlib.nsf/techdocs/AE818B5D1DBB02EC87256DDE00007821
rHype
is an open source hypervisor that appears to support the 970:
http://www.research.ibm.com/hypervisor/
If you don't have a 970 handy, you may be able to run rHype on Mambo/Systemsim:
http://www.alphaworks.ibm.com/tech/systemsim970
--
Wes Felter - wesley@felter.org - http://felter.org/wesley/
IBM Austin Research Lab, but not speaking for them |
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Guest
|
| Posted:
Sat Oct 22, 2005 8:15 am Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
|
|
a little hypervisor topic drift from a thread in a.f.c ... somewhat
related to mainframe hypervisors
http://www.garlic.com/~lynn/2005s.html#23
i've previously posted on the erep/ras issue for mainframe unix ports
....
1) at&t unix infrastructure and api on top a stripped down tss/370
kernel called ssup. only available internally within at&t
2) amdahl uts (called gold before announce) .... typically ran under
virtual machine hypervisor
3) aix/370 (& aix/ps2), ucla locus port ... also ran under virtual
machine hypervisor (done by the same palo alto group that had done the
bsd port to pc/rt for aos)
these mainframes were frequently multi-million dollar affairs with
cadre of people doing service and preventive maintenance. the field
service people claimed they couldn't/wouldn't do their job without the
appropriate erep/ras (somewhat imagine automobile analogy and your
multimillion dollar investment is out of warrenty because of not
getting its service).
the issue was that erep/ras was a major component of mainframe
operating system ... a significantly larger undertaking than straight
forward unix port to mainframe. the tss/370 ssup and the virtual
machine hypervisors provided this erep/ras function on behalf of the
unix port (w/o the significant effort of having to build a unix-based
erep/ras implementation)
for quite a bit of topic drift ... some posts about doing erep/ras
stuff for the disk engineering lab
http://www.garlic.com/~lynn/subtopic.html#disk
random past posts mentioning mainframe unix ports
http://www.garlic.com/~lynn/99.html#2 IBM S/360
http://www.garlic.com/~lynn/99.html#64 Old naked woman ASCII art
http://www.garlic.com/~lynn/99.html#66 System/1 ?
http://www.garlic.com/~lynn/99.html#190 Merced Processor Support at it
again
http://www.garlic.com/~lynn/99.html#191 Merced Processor Support at it
again
http://www.garlic.com/~lynn/2000c.html#8 IBM Linux
http://www.garlic.com/~lynn/2000e.html#27 OCF, PC/SC and GOP
http://www.garlic.com/~lynn/2000f.html#68 TSS ancient history, was X86
ultimate CISC? designs)
http://www.garlic.com/~lynn/2000f.html#69 TSS ancient history, was X86
ultimate CISC? designs)
http://www.garlic.com/~lynn/2000f.html#70 TSS ancient history, was X86
ultimate CISC? designs)
http://www.garlic.com/~lynn/2001.html#44 Options for Delivering
Mainframe Reports to Outside Organizat ions
http://www.garlic.com/~lynn/2001.html#49 Options for Delivering
Mainframe Reports to Outside Organizat ions
http://www.garlic.com/~lynn/2001f.html#20 VM-CMS emulator
http://www.garlic.com/~lynn/2001f.html#22 Early AIX including AIX/370
http://www.garlic.com/~lynn/2001l.html#17 mainframe question
http://www.garlic.com/~lynn/2001l.html#18 mainframe question
http://www.garlic.com/~lynn/2001l.html#19 mainframe question
http://www.garlic.com/~lynn/2002b.html#36 windows XP and HAL: The CP/M
way still works in 2002
http://www.garlic.com/~lynn/2002d.html#31 2 questions: diag 68 and
calling convention
http://www.garlic.com/~lynn/2002i.html#54 Unisys A11 worth keeping?
http://www.garlic.com/~lynn/2002i.html#63 Hercules and System/390 - do
we need it?
http://www.garlic.com/~lynn/2002i.html#81 McKinley Cometh
http://www.garlic.com/~lynn/2002j.html#36 Difference between Unix and
Linux?
http://www.garlic.com/~lynn/2002n.html#54 SHARE MVT Project anniversary
http://www.garlic.com/~lynn/2002n.html#58 IBM S/370-168, 195, and 3033
http://www.garlic.com/~lynn/2002n.html#67 Mainframe Spreadsheets -
1980's History
http://www.garlic.com/~lynn/2002p.html#45 Linux paging
http://www.garlic.com/~lynn/2003d.html#8 IBM says AMD dead in 5yrs ...
-- Microsoft Monopoly vs. IBM
http://www.garlic.com/~lynn/2003d.html#54 Filesystems
http://www.garlic.com/~lynn/2003h.html#35 UNIX on LINUX on VM/ESA or
z/VM
http://www.garlic.com/~lynn/2003h.html#45 Question about Unix
"heritage"
http://www.garlic.com/~lynn/2003i.html#53 A Dark Day
http://www.garlic.com/~lynn/2003k.html#5 What is timesharing, anyway?
http://www.garlic.com/~lynn/2003o.html#49 Any experience with "The Last
One"?
http://www.garlic.com/~lynn/2004c.html#6 If the x86 ISA could be redone
http://www.garlic.com/~lynn/2004c.html#10 XDS Sigma vs IBM 370 was Re:
I/O Selectric on eBay: How to use?
http://www.garlic.com/~lynn/2004d.html#72 ibm mainframe or unix
http://www.garlic.com/~lynn/2004h.html#41 Interesting read about
upcoming K9 processors
http://www.garlic.com/~lynn/2004h.html#42 Interesting read about
upcoming K9 processors
http://www.garlic.com/~lynn/2004n.html#30 First single chip 32-bit
microprocessor
http://www.garlic.com/~lynn/2004q.html#37 A Glimpse into PC Development
Philosophy
http://www.garlic.com/~lynn/2004q.html#38 CAS and LL/SC
http://www.garlic.com/~lynn/2004q.html#39 CAS and LL/SC
http://www.garlic.com/~lynn/2005b.html#22 The Mac is like a modern day
Betamax
http://www.garlic.com/~lynn/2005c.html#20 [Lit.] Buffer overruns
http://www.garlic.com/~lynn/2005f.html#28 Where should the type
information be: in tags and descriptors
http://www.garlic.com/~lynn/2005h.html#5 Single System Image questions
http://www.garlic.com/~lynn/2005j.html#26 IBM Plugs Big Iron to the
College Crowd
http://www.garlic.com/~lynn/2005m.html#4 [newbie] Ancient version of
Unix under vm/370
http://www.garlic.com/~lynn/2005m.html#7 [newbie] Ancient version of
Unix under vm/370
http://www.garlic.com/~lynn/2005q.html#14 What ever happened to Tandem
and NonStop OS ?
http://www.garlic.com/~lynn/2005q.html#26 What ever happened to Tandem
and NonStop OS ?
http://www.garlic.com/~lynn/2005q.html#49 What ever happened to Tandem
and NonStop OS ? |
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Naresh Nayar
Guest
|
| Posted:
Wed Nov 02, 2005 5:15 pm Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
|
|
You can run a bare metal OS on POWER5. It is just that IBM has chosen to
ship POWER5 platforms with a hypervsior only.
"Maynard Handley" <name99@name99.org> wrote in message
news:name99-8BD1C8.16075420102005@localhost...
| Quote: | In article <MPG.1dc17e9f668dc38f989c59@news.individual.net>,
Keith R. Williams <krw@att.bizzzz> wrote:
In article <name99-80FC96.15254219102005@localhost>, name99
@name99.org says...
In article <MPG.1dc027ab3e585617989c48@news.individual.net>,
Keith R. Williams <krw@att.bizzzz> wrote:
In article <name99-D6D994.18013118102005@localhost>, name99
@name99.org says...
snip
More interesting, IMHO, is the way IBM seems to be making no
effort
whatsoever to move virtualization support into the PPC
architecture.
That, more than anything else, I take to mean PPC is dead as a
concept.
IBM will support POWER (of course) and will support the PPC
instruction
set in various strange places like Cell, but the idea of an
industry-wide architecture that's bigger than IBM is no longer of
interest to them.
I'm not sure what you mean by "no effort whatsoever to move
virualization support..". Power4 and the blade version of the 970
have "hypervisor mode", which is exactly that.
You miss my point.
Yes indeed, which is why I added the "not sure" part to my
response. I thought there was something missing there. ;-)
Yes IBM's chips have (substantial) virtualization
support. But, and this is my point, they are not making that part of
the
formal (IBM-indepent) PPC architecture.
As I see it, there are (at least) two distinct branches of the PPC
line. The workstation/server lines have virtualization support (and
no BATs). HV is really a processor dependent (Book 4) thing and
the "PowerPC architecture" really runs "under" the HV layer on
these processors. Since these processors tend to come in IBM
equipment, with an IBM hypervisor/OS, they don't include the under-
the-covers detail of the HV layer. I have no idea if that'll
change.
One of the IBM journal article on POWER5 claims that you *cannot* write
an OS to the "PPC" layer of POWER5. A hypervisor has to be running and
you have to write to the hypervisor. That was what occasioned my point
in the first place. OK, so now you can split ever finer hairs about how
the user code remains the same, but this is not a legalisms issue, it is
a politics issue. Go back to my point --- if IBM's flagship PPC product
won't run an unmodified version of PPC Linux, then PPC as a concept is
dead outside the embedded space. |
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| Posted:
Thu Nov 03, 2005 1:15 am Post subject:
Re: Power5 and Cell, new issue of IBM Journal of R&D |
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Keith R. Williams wrote:
| Quote: | The second "branch" is the embedded space. AFAIK, this is where
the "IBM-independent" PPC architecture program is headed. HV isn't
likely to penetrate into this space and BATs are quite likely to
remain.
|
ISTR reading that PA Semi's PWRficient processor supports
virtualization, so clearly hypervisor support _is_
"likely to penetrate into this space".
Paul A. Clayton |
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