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Anton Ertl
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Jerry Avins
Guest
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 Posted:
Fri Oct 28, 2005 12:15 am Post subject:
Re: A stupid post about Intel's latest computer chip ( s) |
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Winfield Hill wrote:
| Quote: | Bruce McFarling wrote...
In Forth, that "copy or consume" decision is programmed explicitly,
and is responsible for much of the "stack noise" in the low level
words that tends to dissappear in higher level words
stack noise?
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"Stack dancing" is a kinder equivalent.
Jerry
--
Engineering is the art of making what you want from things you can get.
ŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻŻ |
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Ken Smith
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| Posted:
Fri Oct 28, 2005 1:42 am Post subject:
Re: A stupid post about Intel's latest computer chip ( s) |
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In article <pan.2005.10.26.16.17.53.823450@example.net>,
Rich Grise <rich@example.net> wrote:
[...]
| Quote: | I don't see why not. Just write the compiler so that a data push
pushes onto the data stack, and a call pushes on to the address
stack. You could either have the caller clean up the stack(s) or
do it in the called routine, just before it returns. I'd use
method (a), because you don't have to remember stuff from one
page to another. ;-)
|
Or (C) the call stack could contain the data stack popping information.
I think that this would work out faster in a pipelined machine.
--
--
kensmith@rahul.net forging knowledge |
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Ken Smith
Guest
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| Posted:
Fri Oct 28, 2005 1:45 am Post subject:
Re: A stupid post about Intel's latest computer chip ( s) |
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In article <pan.2005.10.26.17.27.43.715424@example.net>,
Rich Grise <rich@example.net> wrote:
[....]
| Quote: | no. in fact, the return address can be passed in a register.
Not if you want reentrant code.
|
I did re-entrant code on an 1802. You save the caller's address on the
"stack" when the routines starts up.
--
--
kensmith@rahul.net forging knowledge |
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Wayne
Guest
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| Posted:
Fri Oct 28, 2005 8:15 am Post subject:
Re: A stupid post about Intel's latest computer chip ( s) |
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Ohh Good grief, don't you know every Intel Mac is going to ship with an
Array Async Chip for the Openboot application! Only Joking, but who knows
what will happen.
Also, notice that the company name for Chuck's chip is now, INTELasys
(capitalisation mine)!
On Tue, 25 Oct 2005 02:30:04 +1000, maghas@Ryugyong.Hotel
<nospam@spamless.com> wrote:
| Quote: |
"Casper H.S. Dik" <Casper.Dik@Sun.COM> wrote in message
news:435ce764$0$11069$e4fe514c@news.xs4all.nl...
"A Man Crying Alone In The Wilderness" <cpu16x1832@wmconnect.com
writes:
maghas@Ryugyong.Hotel wrote:
cpu16x1832@wmconnect.com> wrote in message
news:1130088424.198227.277960@g44g2000cwa.googlegroups.com...
Come on now, you are less of an idiot to understand this,
FORTH never went anywhere for a good reason.
Totally un-maintainable.
Presumably for the same reason you understand all machine code is
un-maintainable. Maybe read some more to develop you knowledge of
computer programming languages and their relationship to machine code.
And a Forth interpreter is shipped embedded in the hardware of all
Macs and Sun SPARCs. And that is a pretty good indication of the
application space.
yep. With NO applications either.
|
--
Using M2, Opera's revolutionary e-mail client: http://www.opera.com/m2/ |
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A Man Masterbating Alone
Guest
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| Posted:
Sat Oct 29, 2005 12:15 am Post subject:
Re: A stupid post about Intel's latest computer chip ( s) |
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I guess, maybe, double non-sense,
1) with a caller's address can ONLY BE SAVED IN A REGISTER, then
2) an interrupt occurs, before the register has been saved anywhere!
think simple, where does the previous program counter address go? |
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A Man Masterbating Alone
Guest
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| Posted:
Sat Oct 29, 2005 12:15 am Post subject:
Re: A stupid post about Intel's latest computer chip ( s) |
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David Kastrup wrote:
| Quote: | "anonymous" <cpu16x1832@wmconnect.com> writes:
Ken Smith wrote:
In article <pan.2005.10.26.17.27.43.715424@example.net>,
Rich Grise <rich@example.net> wrote:
[....]
no. in fact, the return address can be passed in a register.
Not if you want reentrant code.
I did re-entrant code on an 1802. You save the caller's address on the
"stack" when the routines starts up.
I guess the 1802 was without external interrupts, either the
call-primitive should disable interrupts or it would be an interrupt
frequency gamble?
Nonsense. Do you have any experience with reentrant programming? The
interrupt routine has to restore all registers upon returning,
including the return address register. That's all.
That means that the automatically handled return address register for
interrupts must be separate from the return address register for user
space programs. Or the user space return address register must be
copied elsewhere when an interrupt occurs.
But that's basically all. Interrupt routines have to leave the user
accessible machine as they found it. Whether they do this with stacks
or extra registers or other trickery, is beside the point.
--
David Kastrup, Kriemhildstr. 15, 44793 Bochum
|
I guess, double non-sense,
1) with a caller's address SAVED TO A REGISTER, then
2) an interrupt occurs,
think simple, where does the previous program counter address go?
caller's seved to regiif an interrupt |
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anonymous
Guest
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| Posted:
Sat Oct 29, 2005 12:15 am Post subject:
Re: A stupid post about Intel's latest computer chip ( s) |
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Ken Smith wrote:
| Quote: | In article <pan.2005.10.26.17.27.43.715424@example.net>,
Rich Grise <rich@example.net> wrote:
[....]
no. in fact, the return address can be passed in a register.
Not if you want reentrant code.
I did re-entrant code on an 1802. You save the caller's address on the
"stack" when the routines starts up.
--
--
kensmith@rahul.net forging knowledge
|
I guess the 1802 was without external interrupts, either the
call-primitive should disable interrupts or it would be an interrupt
frequency gamble?
Or a reason they are not as popular ...
( ... I accidentally re-wired a 6502 where A X and Y are stacks !!!)
Regards,
maw |
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David Kastrup
Guest
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| Posted:
Sat Oct 29, 2005 12:15 am Post subject:
Re: A stupid post about Intel's latest computer chip ( s) |
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"anonymous" <cpu16x1832@wmconnect.com> writes:
| Quote: | Ken Smith wrote:
In article <pan.2005.10.26.17.27.43.715424@example.net>,
Rich Grise <rich@example.net> wrote:
[....]
no. in fact, the return address can be passed in a register.
Not if you want reentrant code.
I did re-entrant code on an 1802. You save the caller's address on the
"stack" when the routines starts up.
I guess the 1802 was without external interrupts, either the
call-primitive should disable interrupts or it would be an interrupt
frequency gamble?
|
Nonsense. Do you have any experience with reentrant programming? The
interrupt routine has to restore all registers upon returning,
including the return address register. That's all.
That means that the automatically handled return address register for
interrupts must be separate from the return address register for user
space programs. Or the user space return address register must be
copied elsewhere when an interrupt occurs.
But that's basically all. Interrupt routines have to leave the user
accessible machine as they found it. Whether they do this with stacks
or extra registers or other trickery, is beside the point.
--
David Kastrup, Kriemhildstr. 15, 44793 Bochum |
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A Man Masterbating Alone
Guest
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| Posted:
Sat Oct 29, 2005 12:15 am Post subject:
Re: A stupid post about Intel's latest computer chip ( s) |
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David Kastrup wrote:
| Quote: | "A Man Masterbating Alone In The Wilderness" <cpu16x1832@wmconnect.com> writes:
David Kastrup wrote:
"anonymous" <cpu16x1832@wmconnect.com> writes:
Ken Smith wrote:
In article <pan.2005.10.26.17.27.43.715424@example.net>,
Rich Grise <rich@example.net> wrote:
[....]
no. in fact, the return address can be passed in a register.
Not if you want reentrant code.
I did re-entrant code on an 1802. You save the caller's address
on the "stack" when the routines starts up.
I guess the 1802 was without external interrupts, either the
call-primitive should disable interrupts or it would be an interrupt
frequency gamble?
Nonsense. Do you have any experience with reentrant programming? The
interrupt routine has to restore all registers upon returning,
including the return address register. That's all.
That means that the automatically handled return address register for
interrupts must be separate from the return address register for user
space programs. Or the user space return address register must be
copied elsewhere when an interrupt occurs.
But that's basically all. Interrupt routines have to leave the user
accessible machine as they found it. Whether they do this with stacks
or extra registers or other trickery, is beside the point.
I guess, double non-sense,
1) with a caller's address SAVED TO A REGISTER, then
2) an interrupt occurs,
think simple, where does the previous program counter address go?
Sigh. Did you even read what I wrote above? An interrupt routine has
to have _some_ place to store the old program counter address. This
is either the stack, or a place that is not used by the user (which
implies that interrupts can't be nested without additional code before
reenabling them).
You can reenable interrupts or reenter routines as soon as a
potentially non-stackable return register has been moved to a
stackable or at least a unique place. Whether this movement is done
by user code or the machine, is beside the point. And you can
reenable interrupts even before starting to save other registers on
some stack. Whether you get an interrupt in the middle of a register
save sequence or elsewhere is just the same, as long as you restore to
the situation before the interrupt.
caller's seved to regiif an interrupt
If you want to put forth an argument, try to use English words at
least.
--
David Kastrup, Kriemhildstr. 15, 44793 Bochum
|
I guess you missed my final post. "If a caller's address is only ever
SAVED TO A REGISTER ...", anyway. |
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David Kastrup
Guest
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| Posted:
Sat Oct 29, 2005 12:15 am Post subject:
Re: A stupid post about Intel's latest computer chip ( s) |
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|
"A Man Masterbating Alone In The Wilderness" <cpu16x1832@wmconnect.com> writes:
| Quote: | David Kastrup wrote:
"anonymous" <cpu16x1832@wmconnect.com> writes:
Ken Smith wrote:
In article <pan.2005.10.26.17.27.43.715424@example.net>,
Rich Grise <rich@example.net> wrote:
[....]
no. in fact, the return address can be passed in a register.
Not if you want reentrant code.
I did re-entrant code on an 1802. You save the caller's address
on the "stack" when the routines starts up.
I guess the 1802 was without external interrupts, either the
call-primitive should disable interrupts or it would be an interrupt
frequency gamble?
Nonsense. Do you have any experience with reentrant programming? The
interrupt routine has to restore all registers upon returning,
including the return address register. That's all.
That means that the automatically handled return address register for
interrupts must be separate from the return address register for user
space programs. Or the user space return address register must be
copied elsewhere when an interrupt occurs.
But that's basically all. Interrupt routines have to leave the user
accessible machine as they found it. Whether they do this with stacks
or extra registers or other trickery, is beside the point.
I guess, double non-sense,
1) with a caller's address SAVED TO A REGISTER, then
2) an interrupt occurs,
think simple, where does the previous program counter address go?
|
Sigh. Did you even read what I wrote above? An interrupt routine has
to have _some_ place to store the old program counter address. This
is either the stack, or a place that is not used by the user (which
implies that interrupts can't be nested without additional code before
reenabling them).
You can reenable interrupts or reenter routines as soon as a
potentially non-stackable return register has been moved to a
stackable or at least a unique place. Whether this movement is done
by user code or the machine, is beside the point. And you can
reenable interrupts even before starting to save other registers on
some stack. Whether you get an interrupt in the middle of a register
save sequence or elsewhere is just the same, as long as you restore to
the situation before the interrupt.
| Quote: | caller's seved to regiif an interrupt
|
If you want to put forth an argument, try to use English words at
least.
--
David Kastrup, Kriemhildstr. 15, 44793 Bochum |
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A Man Masterbating Alone
Guest
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| Posted:
Sat Oct 29, 2005 12:15 am Post subject:
Re: A stupid post about Intel's latest computer chip ( s) |
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I guess, maybe double non-sense,
1) if a caller's address is only ever SAVED TO A REGISTER, then
2) an interrupt occurs, before interrupts have been disabled AND the
return address register has been saved, ...
think simple, where does the previous program counter address go? |
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David Kastrup
Guest
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| Posted:
Sat Oct 29, 2005 12:15 am Post subject:
Re: A stupid post about Intel's latest computer chip ( s) |
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"A Man Masterbating Alone In The Wilderness" <cpu16x1832@wmconnect.com> writes:
| Quote: | For an example the 69R000 Rad had microcontroller, doesn't use stacks
and saves all return addresses into a register, however, interrupts are
disabled with every call primitive, and must be.
|
But you can reenable them as soon as you have saved this register on
some stack.
--
David Kastrup, Kriemhildstr. 15, 44793 Bochum |
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A Man Masterbating Alone
Guest
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| Posted:
Sat Oct 29, 2005 12:15 am Post subject:
Re: A stupid post about Intel's latest computer chip ( s) |
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For an example the 69R000 Rad had microcontroller, doesn't use stacks
and saves all return addresses into a register, however, interrupts are
disabled with every call primitive, and must be. |
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A Man Masterbating Alone
Guest
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| Posted:
Sat Oct 29, 2005 5:26 am Post subject:
Re: A stupid post about Intel's latest computer chip ( s) |
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Frithiof Andreas Jensen wrote:
| Quote: | "A Man Crying Alone In The Wilderness" <cpu16x1832@wmconnect.com> wrote in
message news:1130080284.332527.14090@g14g2000cwa.googlegroups.com...
Which one do you believe requires less chip internal hardware wires?
( and, thus, a higher efficiency of "Turing" machine language
expression ( and code profile))
Why would I - or anyone else - even care when the Important Question is:
"Does Half Life run on it"??
|
Going where no gamer has gone before ... super scalable multiple
parallel symetric parallel processors ( with LEGO(tm) like
expandability,) executing multi layered sprites and partion trees to
drive more ultra hi resolution projection panels, and, so blindingly
fast , a super computer beyond which no mere mortal could hope to
survive.
Oh, well, national security administration and big business rule.
Or, whether asychronous or syschronous is your game, name this tune, in
the least number of notes,
URL,
http://groups.google.com/group/comp.lang.java.machine/msg/b400d03ddc0f5a4f?dmode=source&hl=en
---
Virtue is the only goodness, however, where 'hording' rules, hero's
don't live long. Be a hero, anyway. |
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