ravindra kalla
Joined: 31 Jul 2005
Posts: 19
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 Posted:
Sat Nov 19, 2005 4:35 pm Post subject:
input in spartan kit |
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hi,
I made a programe for block matching motion estimation.In this i have to compare the (4*4) matrics of current frame,with 18,(4*4) mtrics of search frame.each element of matrics is pixel value(containing 8 bit).In first clock cycle (1,1) element of all the matrics is going to the 19 inputs of the programe.In next clock cycle(1,2) elements of all matrics will be on the inputs.Their is 18 processing element inside the programe,each processing element getting one input from search frame and one input from data frame.data frame input is common in all processing element.
so i have to give 18(search frame pixel)+1 data frame pixel in every clock cycle in my verilog programe.
now for implementing this in FPGA,i m using sparta3xp200ft256,that is having 100 I/O pin,but i require more input pin.
please suggest any method to reduce input pin,so that i can check it in spartan kit.
How can i give test signal to spartan signal for this by using xilinx webpack7.1i |
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