| Author |
Message |
Gromer
Guest
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 Posted:
Fri Nov 25, 2005 9:15 am Post subject:
Memory Suggestions |
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Hi,
I have one basic doubt on how MEMORY WR/RD# cycles are emulated.. (i.e
memory read & write cycles emulated in software)..
How is the Assertion/Deassertion of WR/RD pins taken care (emulated) in
software whenever a memory address is being deferenced.
Thanks |
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Yousuf Khan
Guest
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| Posted:
Fri Nov 25, 2005 9:15 am Post subject:
Re: Memory Suggestions |
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Gromer wrote:
| Quote: | Hi,
I have one basic doubt on how MEMORY WR/RD# cycles are emulated.. (i.e
memory read & write cycles emulated in software)..
How is the Assertion/Deassertion of WR/RD pins taken care (emulated) in
software whenever a memory address is being deferenced.
|
Simple, you don't have to worry about it. That's too low level for a CPU
emulator.
Yousuf Khan |
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PeteS
Guest
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| Posted:
Fri Nov 25, 2005 9:15 am Post subject:
Re: Memory Suggestions |
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As noted, this is very low level. Indeed, it depends on the type of
memory (DDR SDRAM, SDRAM, Sync Flash/ROM/SRAM, Async devices) and even
then the requirements can vary greatly (that's one reason why memory
controllers have so many settable parameters).
Why do you ask?
Cheers
PeteS |
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