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shahar
Guest
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Posted:
Wed Dec 07, 2005 5:16 pm Post subject:
external i/o memory |
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I'd like to access to external i/o to write and read external peripheral
through some additional address decoding .
Does anyone know , how make that through source code , I work with
ezkit for F2812 and CCS2.0 .
Thanks . |
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Noway2
Guest
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Posted:
Wed Dec 07, 2005 5:16 pm Post subject:
Re: external i/o memory |
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A good place to start would be the external interface document for the
F2812, which will also reference some sample code that will show you
how to do this.
In software, you need to define the section of memory that you wish to
access and have decoded. This goes in the linker command file(s).
Then in your source code, you use a #PRAGMA statement to declare a
variable as being stored in that particular section of memory. From
that point, accessing the memory is done through simple variable
assignments and reads, assuming the external hardware is properly
configured to respond to the bus access cycle.
For chip select decoding purposes, there are 3 chip select lines from
the processor that are asserted according to the memory range that is
being accessed. You can either use these pins, or external decoders.
In my application, I am using an FPGA to decode the addresses and
assert the proper chip select lines.
The bus cycle time is controlled through the XINTF configuration
registers, which will determine the number of wait states based on the
XCLKOUT, which is derived from the SYSCLK. |
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shahar
Guest
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Posted:
Mon Dec 12, 2005 9:16 am Post subject:
Re: external i/o memory |
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| Quote: | A good place to start would be the external interface document for the
F2812, which will also reference some sample code that will show you
how to do this.
In software, you need to define the section of memory that you wish to
access and have decoded. This goes in the linker command file(s).
Then in your source code, you use a #PRAGMA statement to declare a
variable as being stored in that particular section of memory. From
that point, accessing the memory is done through simple variable
assignments and reads, assuming the external hardware is properly
configured to respond to the bus access cycle.
For chip select decoding purposes, there are 3 chip select lines from
the processor that are asserted according to the memory range that is
being accessed. You can either use these pins, or external decoders.
In my application, I am using an FPGA to decode the addresses and
assert the proper chip select lines.
The bus cycle time is controlled through the XINTF configuration
registers, which will determine the number of wait states based on the
XCLKOUT, which is derived from the SYSCLK.
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THANKS
Could you send my some project about this [ source code ]
Regards
Shahar |
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Noway2
Guest
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Posted:
Thu Dec 15, 2005 5:16 pm Post subject:
Re: external i/o memory |
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Here is a link to the product page on Ti's website:
http://focus.ti.com/docs/prod/folders/print/tms320f2812.html
You would probabaly be most interested in SPRC097 and SPRU067. The
first of these (packages) is set of sample projects, including examples
on using the external interface. The second is the reference manual on
the external interface.
I would HIGHLY recommend downloading and experimenting with the sample
projects. Amongst other things, the samples will show you the
recommended way to setup and access the peripherals on the F2812, such
as the external interface.
If you are just starting with the F2812, you will probably find
yourself experiencing documentation overload at first. Keep with it,
as things will quickly click into place for you. |
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