simon.stockton@baesystems
Guest
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 Posted:
Fri Dec 16, 2005 1:16 am Post subject:
Scrambled Net Names! |
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I am implementing a design in a Xilinx FPGA, using ISE 6.1.3i and for
reasons that are not important right now, have to flatten the hierarchy
"Keep Hierarchy = NO".
Because I am doing this I have lost my hierarchical net names that I
use in my constraints file.
My question quite simply is "How can I identify a net name that was
once embedded in a hierarchy and now has been changed into a different
net name due to the hierarchy being flattened?"
Thanks in advance.
Simon |
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Symon
Guest
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| Posted:
Fri Dec 16, 2005 1:16 am Post subject:
Re: Scrambled Net Names! |
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Simon,
You madman, it's hard enough keeping track of the random net name changes
every time I run Synplify, let alone flattening the hierarchy. I wonder if
you could write a Perl script to compare the before flattening and after
EDIF files and recover the names that way?
Cheers, Syms.
<simon.stockton@baesystems.com> wrote in message
news:1134674948.024250.96570@g47g2000cwa.googlegroups.com...
| Quote: | I am implementing a design in a Xilinx FPGA, using ISE 6.1.3i and for
reasons that are not important right now, have to flatten the hierarchy
"Keep Hierarchy = NO".
Because I am doing this I have lost my hierarchical net names that I
use in my constraints file.
My question quite simply is "How can I identify a net name that was
once embedded in a hierarchy and now has been changed into a different
net name due to the hierarchy being flattened?"
Thanks in advance.
Simon
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