Piotr Wyderski
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 Posted:
Wed Dec 28, 2005 5:15 pm Post subject:
Lattice XP simple simulator |
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Is it possible to simulate an extremely simple VHDL design generated by
ispLEVER Starter?
It is composed of an EBR RAM block which implements a 512x8 ROM and several
wires. :-)
I would like to check whether it works, so even a very simple waveform-based
simulator will
do, but I can't find it in the package. Is there any?
Best regards
Piotr Wyderski
--
"If you were plowing a field, which would you rather use?
Two strong oxen or 1024 chickens?" -- Seymour Cray |
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