Guest
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 Posted:
Fri Dec 30, 2005 1:15 am Post subject:
Virtex 4 desing : ChipScope insertion impacts my timing prob |
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Hi,
I am working on a Virtex4 FX design, when the system clock runs at
100MHz, the memory controller core does not work correctly. Then I
inserted ChipScope trying to identify the problem, but once it is
inserted, the problem is gone!
I know it is of timing problem since if I lower the system clock to
50MHz, there is no problem either.
It looks like that after the chipscope is inserted, somehow the
routing is altered in favor of the memory controller.
I just wonder if there are any trick so that Chipscope insertion does
not impact design routing? |
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