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Ray Andraka
Guest
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 Posted:
Fri Dec 10, 2004 5:50 am Post subject:
Re: how to speed up my accumulator ?? |
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Moti,
Another trick for NCO's that will double the speed, assuming you are careful
about how you update the tuning word (phase increment) is to use two
accumulators running clock enabled on every other clock. One is initialized
with 0, the other is initialized with the phase increment value, and then both
are incremented by 2x the phase increment on every other clock. This allows
two clock periods for the accumulator carry to propagate, and you get the
current and next phase out at the same time on every other clock. A 2:1 mux
switching at the clock rate selects the output from the two accumulators on
alternate clocks.
I've used this trick also for cases where the mixer it is driving can't run at
the full clock rate (I usually use a CORDIC rotator there, see my XCELL
article about that). In that case, you use duplicate copies of the mixer, one
for even samples and the other for odd samples. The phase for both is
incremented by 2x the sample phase increment, with one offset by 1x the phase
increment.
I don't think you'll have to resort to this to get to 200MHz with a
Spartan3,however. I'm pretty sure careful floorplanning combined with making
sure you have just one level of LUT logic in the critical path (new addend
through carry chain to accumulator register) will get you 200MHz with a very
comfortable margin at 32 bits.
--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930 Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com
"They that give up essential liberty to obtain a little
temporary safety deserve neither liberty nor safety."
-Benjamin Franklin, 1759 |
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Allan Herriman
Guest
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| Posted:
Fri Dec 10, 2004 11:58 am Post subject:
Re: how to speed up my accumulator ?? |
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On Thu, 09 Dec 2004 23:14:49 GMT, "John_H" <johnhandwork@mail.com>
wrote:
| Quote: | "rickman" <spamgoeshere4@yahoo.com> wrote in message
news:41B8C572.661C916@yahoo.com...
PFD means Phase-Frequency-Detector?
Ayup.
I believe you said that the digital phase detectors are not very
linear. Are you saying that there are *no* good detectors? What if a
digital phase detector were connected to analog current sources so that
the pullup and pulldown were balanced? Would that be linear enough? I
don't think that would be hard to design.
One example of a linear phase detector is an XOR to provide a center level
at 90 degree phase shift with nonlinearities as one approaches +/- 0.25 UI
of jitter with the circuit giving up in the "other" 180 degrees of phase.
I'd worry about implementing an XOR-type PFD in an FPGA because of problems
not only with jitter but with feedthrough from other frunctions in the FPGA
on the Voh and Vol levels.
One PFD I used about 10 years ago that appeared to have good specs was the
Analog Devices AD9901 which also produced a voltage output rather than the
charge pumps we tend to be more familiar with.
|
I made an error earlier - the mixer type phase detectors only have a
sinusoidal PD characteristic when fed with sine waves. When fed with
square waves (such as from the output of an FPGA or divider) they have
performance basically identical to that of an XOR gate, with a
triangular PD characteristic. An XOR gate is much cheaper and easier
to use than a multiplier, of course.
One can work around the Voh & Vol problems by using an external CMOS
gate fed from filtered supplies.
One disadvantage of the XOR gate (apart from the lack of frequency
discrimination) is that, at lock, at has a square wave on its output.
This results in reference spurs at the PLL output that can be
difficult to remove. Since the square wave is predictable, it is
possible to come up with compensation schemes (e.g. by adding a fixed
duty cycle square wave of opposite phase) to reduce the level of the
spurs.
The AD9901 is basically an XOR gate with an added frequency
discriminator.
Regards,
Allan |
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Allan Herriman
Guest
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| Posted:
Fri Dec 10, 2004 1:30 pm Post subject:
Re: how to speed up my accumulator ?? |
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On Fri, 10 Dec 2004 17:58:47 +1100, Allan Herriman
<allan.herriman.hates.spam@ctam.com.au.invalid> wrote:
| Quote: | The AD9901 is basically an XOR gate with an added frequency
discriminator.
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.... and T flip flops on the XOR inputs to ensure 50% duty cycle.
Allan |
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