| Author |
Message |
JC
Guest
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 Posted:
Mon Nov 29, 2004 7:20 am Post subject:
Measuring L1 I-cache misses on P4 |
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I'm interested in measuring L1 I-cache hits/misses for a program of
mine running on a P4 (D-cache hits/misses may also be interesting).
The Intel manual's treatment of performance counters on the P4 is
pretty opaque. I feel like I'm doing my taxes.
Does someone know offhand if this is possible on the P4, and what
counters/events/tagging/etc. I need to configure to set this up?
Thanks,
JC |
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Per Ekman
Guest
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| Posted:
Mon Nov 29, 2004 2:22 pm Post subject:
Re: Measuring L1 I-cache misses on P4 |
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JC <jchow@removethis.footstool.stanford.edu> writes:
| Quote: | I'm interested in measuring L1 I-cache hits/misses for a program of
mine running on a P4 (D-cache hits/misses may also be interesting).
The Intel manual's treatment of performance counters on the P4 is
pretty opaque. I feel like I'm doing my taxes.
|
Then I'll recommend PAPI where someone has already done the dirty
work for you.
http://icl.cs.utk.edu/papi/
*p
np. Metal Slug! |
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David Kanter
Guest
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| Posted:
Mon Nov 29, 2004 8:56 pm Post subject:
Re: Measuring L1 I-cache misses on P4 |
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JC <jchow@removethis.footstool.stanford.edu> wrote in message news:<coe1g4$qu2$1@news.Stanford.EDU>...
| Quote: | I'm interested in measuring L1 I-cache hits/misses for a program of
mine running on a P4 (D-cache hits/misses may also be interesting).
|
The P4 doesn't have an instruction cache, it has a trace cache. Very
different animal.
| Quote: | The Intel manual's treatment of performance counters on the P4 is
pretty opaque. I feel like I'm doing my taxes.
Does someone know offhand if this is possible on the P4, and what
counters/events/tagging/etc. I need to configure to set this up?
|
I recommend VTune (I am sure Stanford should have a license). It will
allow you to look at your code and see how many trace cache misses you
have, then figure out the hit/miss rate from there. I highly
recommend it; get a copy of VTune and use the "Sampling" feature with
Event Based Statistics, rather than Timer Based Statistics. If you
have your source code, it will actually let you see where these trace
cache misses occur in your code, to help you tune it. Even without
the source code, it will let you see which modules the TC misses
belong to (if you call external libraries etc.).
David Kanter |
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