PCI design with vhdl
CASTalk.com Forum Index CASTalk.com
Discussion of DSP, FPGA, storage and embedded system.
 
 FAQFAQ   MemberlistMemberlist     RegisterRegister 
 ProfileProfile   Log in to check your private messagesLog in to check your private messages   Log inLog in 
 
Google
 
Web castalk.com
PCI design with vhdl

 
Post new topic   Reply to topic    CASTalk.com Forum Index -> FPGA
Author Message
kender
Guest





Posted: Fri Dec 10, 2004 7:21 pm    Post subject: PCI design with vhdl Reply with quote

Hi, I've read that many of you have realized PCI card using FPGAs...
I have to do something similar, but I hope simpler, for my thesis (I'm
an university student): I have to realize a PCI core (but it should
work as a target only device) that should transfer some data that is
collected by the FPGA to an embedded processor, via the PCI bus...
I "just" have to realize the PCI component for the FPGA as all the
other stuff have already been done (and maybe connect the component to
data acquisition logic) and the processor already has its own PCI
controller (that acts as master and arbiter), so my question is: where
should I start from?

I've read part of the PCI Local Bus Specification but I have some
doubts about the addressing differences..
Back to top
Antti Lukats
Guest





Posted: Fri Dec 10, 2004 7:46 pm    Post subject: Re: PCI design with vhdl Reply with quote

"kender" <DL.kender@gmail.com> wrote in message
news:7f3f5794.0412100621.5cddee46@posting.google.com...
Quote:
Hi, I've read that many of you have realized PCI card using FPGAs...
I have to do something similar, but I hope simpler, for my thesis (I'm
an university student): I have to realize a PCI core (but it should
work as a target only device) that should transfer some data that is
collected by the FPGA to an embedded processor, via the PCI bus...
I "just" have to realize the PCI component for the FPGA as all the
other stuff have already been done (and maybe connect the component to
data acquisition logic) and the processor already has its own PCI
controller (that acts as master and arbiter), so my question is: where
should I start from?

www.gaisler.com
GRLIB
there is vhdl PCI core that can be used for your purpose

antti
Back to top
Ben Popoola
Guest





Posted: Sat Dec 11, 2004 5:16 pm    Post subject: Re: PCI design with vhdl Reply with quote

kender wrote:
Quote:
Hi, I've read that many of you have realized PCI card using FPGAs...
I have to do something similar, but I hope simpler, for my thesis (I'm
an university student): I have to realize a PCI core (but it should
work as a target only device) that should transfer some data that is
collected by the FPGA to an embedded processor, via the PCI bus...
I "just" have to realize the PCI component for the FPGA as all the
other stuff have already been done (and maybe connect the component to
data acquisition logic) and the processor already has its own PCI
controller (that acts as master and arbiter), so my question is: where
should I start from?

I've read part of the PCI Local Bus Specification but I have some
doubts about the addressing differences..

What might help is to write the testbench first!!

Although this sounds odd, what results from this is not only will you
have to fully understand the PCI target portion of the specification, it
will also you in the planning of the datapath of your PCI target core.

It works for me!!
Back to top
Mike Treseler
Guest





Posted: Sat Dec 11, 2004 9:06 pm    Post subject: Re: PCI design with vhdl Reply with quote

Ben Popoola wrote:

Quote:
What might help is to write the testbench first!!
Although this sounds odd, what results from this is not only will you
have to fully understand the PCI target portion of the specification, it
will also you in the planning of the datapath of your PCI target core.
It works for me!!

I agree. Even commercial cores have free
documentation and an evaluation model and testbench.
For me step one is to make the core model run with
it's own testbench on my simulator.
Step two is to make the trial core play with the rest of
my design in an HDL simulation. What better way to
learn and understand the interface?

However, I realize that some designers prefer a
download and go, trial and error process over
hdl simulation. This doesn't work for me,
but I don't doubt that works for some.

-- Mike Treseler
Back to top
 
Post new topic   Reply to topic    CASTalk.com Forum Index -> FPGA All times are GMT
Page 1 of 1

 
You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot vote in polls in this forum




VoIP Electronics Powered by phpBB