possible divergence in x86 virtualization technologies?
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possible divergence in x86 virtualization technologies?
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Wes Felter
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Posted: Wed Mar 09, 2005 7:57 am    Post subject: Re: possible divergence in x86 virtualization technologies? Reply with quote

On 2005-03-07 16:56:19 -0600, "Joe Seigh" <jseigh_01@xemaps.com> said:

Quote:
The bigger problem is the VMCALL instruction to make hypervisor calls.
You need to know what hypervisor you are running under so you know what and how
to make the calls. That means some sort of coordination among the
different vm vendors.

I suspect most hypervisors will use VT/Pacifica to do full
virtualization, so that the guest OSes don't even know they're being
virtualized. In that situation the guest OSes do not make any
hypercalls. Maybe there will be optional special drivers (like under
VMware), but these will be specific to the hypervisor so there's no
problem.

--
Wes Felter - wesley@felter.org - http://felter.org/wesley/
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Yousuf Khan
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Posted: Wed Mar 09, 2005 7:57 am    Post subject: Re: possible divergence in x86 virtualization technologies? Reply with quote

Eric Smith wrote:
Quote:
Yousuf Khan <bbbl67@ezrs.com> writes:

Yeah? Where? So far, AMD is just denying all speculations.


It was in an interview on one of the zillion PC review sites; I have no
idea now which one it was. An AMD spokesman said that their
virtualization technology was homegrown rather than being a copy of
anything Intel was working on.

Well then, this is a case where AMD can actually get away with it.
Virtualization can't really be considered a part of the x86 software
stack, with a huge legacy behind it. There's maybe five products out
there that do it, and none of them are so complex that they can't
accomodate an Intel method and an AMD method of virtualization.

Yousuf Khan
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Sander Vesik
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Posted: Wed Mar 09, 2005 12:27 pm    Post subject: Re: possible divergence in x86 virtualization technologies? Reply with quote

In comp.arch Alex Johnson <compuwiz@jhu.edu> wrote:
Quote:
Ed wrote:
"It's hard to imagine that AMD would be so blindingly stupid as to
forward a truly Vanderpool-incompatible virtualization mechanism,"

Interesting. Like they were so blindingly stupid as to forward a truly
SSE-incompatible vector processing extension (3D-Now!)?

The things that will need to understand virtualization are the firmware
and the virtualized operating systems. AMD can control the firmware if
it wants. The OS vendors are not likely to support two approaches to
virtualization because it takes a lot of work to virtualize a major OS.

No. It depends on whetever one can build a abstraction layer easily
that would cover both - nobody (well, possibly with one exception) is
going to be fool enough as to do it with sprinkling a lot of assmebler
through all source files.

Quote:

MWAIT probably has to trap because it changes the system state of the
machine that might interfere with virtualization or could present a hole
to violate the integrity of the virtual environment by waiting on a
memory location which is later changed by someone in a separate virtual
partition. MWAIT should only wake the (virtualized) processor if the
correct virtualized system wakes it.

MWAIT does not need to trap - there needs to be a way to know that
something was mwaiting and continue in that state after a switch back.

Quote:

PAUSE does not need to trap because, as the SDM states: "This
instruction does not change the architectural state of the processor
(that is, it performs essentially a delaying noop operation)."

Alex

--
Sander

+++ Out of cheese error +++
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YKhan
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Posted: Wed Mar 09, 2005 10:23 pm    Post subject: Re: possible divergence in x86 virtualization technologies? Reply with quote

Douglas Siebert wrote:
Quote:
Kind of a moronic position for those speculators to take since the
whole
point of the virtualization tech from both Intel and AMD is that it
will
be completely invisible to the OS and user mode code. It only has to
be
coded in the hypervisor and there aren't exactly thousands of
different
implementations of that kind of software, and the critical sections
where
these differences mattered would be quite small. Who cares if there
are
two code paths for those sections? If game authors can write
completely
different rendering paths for ATI and NVidia cards, I'm sure EMC and
MS
can handle making their software handle both Intel and AMD
virtualization.
Since Xen is open source it will certainly be done for both, and
probably
done by Intel and AMD engineers, at that. Maybe even with support
ready
before you can even buy the CPUs themselves.

That reminds me, how are they adding these extra instructions into the
x86 instruction set? It's been years since I looked into x86 assembly
(since the 386 and 486 days), and previously they used to just add new
instructions into the second bank of instructions by adding a specific
instruction prefix (I believe it was called the "ESC" prefix). However
they couldn't just add those extra instructions anywhere they liked
(well, actually initially they could, since it was just Intel
controlling it all back then), but as that second map got filled up,
they had do it strategically, they had to add them in a
compatible-fashion. Have they opened up a new instruction path
nowadays?

Quote:
Anyway there's already a few forks in the x86 world, since Intel
doesn't
support 3Dnow!, AMD doesn't support hyperthreading, AMD didn't
support
MONITOR and MWAIT in their SSE3 implementation. Oh yeah, for a while
there Intel didn't support AMD64, but they recently fixed that.

Also there was a brief period where Intel's version didn't support the
NX-bit in the paging tables.

Quote:
Which points out another alternative. That AMD just does what Intel
did
when they implemented AMD64. Wait until they come out with the docs
about
the tech (which Intel just did) and take a month to copy them with
some
minor modifications to suit your CPU's implementation a bit better
(like
if you had stuff like glueless SMP support the other guy doesn't)
Then
announce it as shipping the following year. If AMD followed that
path,
they'd release their info in a month, then announce a ship date of
2006.
Oh wait...

Well, it took considerably longer for Intel to copy AMD64 than a month.
I think the AMD spec docs were out a full year before AMD actually
released any products. And then it took Intel another 1.5 years to
release their own version. So altogether it was 2.5 years later for
Intel. Mind you I would guess that the AMD64 instruction set would be
much more complicated to copy than a virtual-machine instruction set.

There was an earlier example for AMD. During the introduction of the
MMX instruction set, AMD had their version released on the same day as
Intel's. There was talk that AMD was planning on doing its own
proprietary instruction set previously, but then it decided to license
MMX from Intel and it simply remapped all of its proprietary
instructions to the MMX instruction mappings instead. AMD was able to
do that virtually overnight. I can imagine if compatibility in virtual
machines is a requirement, then it shouldn't be too difficult to remap
Pacifica to Vanderpool or vice-versa. It must relatively
straightforward in the same way MMX was straightforward.

But it may not be necessary, virtual machines aren't that common that
they need compatibility.

Yousuf Khan
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