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Voxer · Guest

I require some basic help in understanding the various memories and their
usage for the Xilinx V2 Pro series of FPGA.

Basically, external to the chip I have SRAM and FLASH - I think I grasp that
internally, there is BRAM which is physical memory and you also have the
option of Select RAM which is just memory configured from CLBs.

What I am trying to understand is what buses are used to allow 'sharing' of
memory between the FPGA and PPC Core ??

My application involves the FPGA gathering serial data (lots of it) and then
I need to fetch it and do some work on it. At the moment
we are only using a small pice and I think it must be Select RAM as the PPC
accesses it via the DCR bus - which is SLOW and where my
problem lies !!

Is it possible for the FPGA and PPC to use the same piece of BRAM ?? What
about the external SRAM ?? And if so, what buses are used to
do the comms ??

Thank You

A chucked in at the deep end PPC developer.

Andi · Guest

Yes you can use BRAM for FPGA and PPC. You can connect on Port to the a process outside the edk ppc system and the other port to the plb or opb bus on the ppc system. If you want the ppc to work fast on that data then use the dsocm interface to connect a bram to ppc. That interface is quit fast and you do not need the plb or opb bus. So no traffic.

Sandeep Kulkarni · Guest

Hello Voxer,
As suggested by Andi, DSOCM would be ideal for you. You
might want to take a look at the Ultracontroller reference design, to take
clues how this bus has been cleverly used.
You can implement a dp memory which has one port conneted to
the dsocm and the other to your logic.

Sandeep
"Andi" <00andi@web.de> wrote in message news:ee8abbb.0@webx.sUN8CHnE...

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