Amir
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 Posted:
Tue Dec 21, 2004 2:04 am Post subject:
Help with importing a comp. as a netlist, edk6.2i |
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Hi! Noticed that my last message was inpossible to read. Hope this one is better. What should I think on when I want to import a component in EDK 6.2i with "import peripheral wizard".. My component is a netlist, means I do not have the source code, but I have the entity of the component. It is the ove I wrote in the User_Logic.vhd and Udp.vhd file? But I getting errors, what am I doing wrong?? Please help..
entity user_logic is generic ( . .
); port ( -- ADD USER PORTS BELOW THIS LINE ------------------ --USER ports added here clk : in std_logic; . . . udp_max_length : in std_logic_vector(7 downto 0));
-- ADD USER PORTS ABOVE THIS LINE ------------------
-- DO NOT EDIT BELOW THIS LINE --------------------- . . . -- DO NOT EDIT ABOVE THIS LINE --------------------- ); end entity user_logic;
-- then I have component declaration with exactly the same signals as those in the user_logic entity, user_ports..
architecture rtl of udp_ip is
attribute syn_black_box : boolean;
component udp_ip port ( -- same signals as those those in the user_logic entity, user_ports.. ); end component; attribute syn_black_box of tenths : component is true;
begin
udpip : udp_ip port map ( clk => Bus2IP_Clk, . . . arp_req_resp_ack => udp_status_reg(arp_req_resp_ack_const), udp_max_length => udp_max_length ); ---------------------------------- entity UDP is generic ( . . ); port ( -- ADD USER PORTS BELOW THIS LINE ------------------
-- here I have all my signals exactly as those in the user_logic entity..
-- ADD USER PORTS ABOVE THIS LINE ------------------
-- DO NOT EDIT BELOW THIS LINE --------------------- -- Bus protocol ports, do not add to or delete . . . . -- DO NOT EDIT ABOVE THIS LINE --------------------- );
attribute MIN_SIZE : string; attribute MIN_SIZE of C_BASEADDR : constant is "0x100";
attribute SIGIS : string; attribute SIGIS of OPB_Clk : signal is "Clk"; attribute SIGIS of OPB_Rst : signal is "Rst";
end entity UDP;
.. . .
architecture IMP of UDP is ---------------------------------------- -- instantiate the User Logic ---------------------------------------- USER_LOGIC_I : entity UDP_v1_00_a.user_logic generic map ( C_DWIDTH => USER_DWIDTH, C_NUM_CE => USER_NUM_CE ) port map ( -- MAP USER PORTS BELOW THIS LINE -- here I mapped all signals in the UDP entity with those in the user_logic entity clk => clk, . .
-- MAP USER PORTS ABOVE THIS LINE . . . . ); end IMP; |
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