Jerome
Guest
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 Posted:
Wed Dec 29, 2004 5:11 pm Post subject:
Understanding the TDM Multichannel protocol |
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Hi
We have a project featuring 4 DSPs interconnected via a TDM protocol,
the DSP choice is not completely decided, we are oscillating between
the AD21262 and the TMS320C6713
The 4 DSPs need to exchange audio data via the TDM lines, we would be
able to decide by soft which DSPs send data to another DSPs
I've some questions about the TDM multichannel protocol, I assume here
both AD and TI DSPs have to same TDM features (if wrong please let me
know).
From what I understand about the TDM bus, could you please confirm the
following points :
- One DSP (lets say the master) generate both Frame sync FS and bit
clock SCLK to all 3 other DSPs (lets say the slaves)
- we configure by soft each DSP to send data at a given TDM time slot
- when a DSP is not set up to send data on a given time slot, its TDM
data output is automaticaly tri-stated so there are no conflict with
the other DSPs
- The above mechanism allows to interconnect all DSPs together without
adding any glue
- Each DSP can be reconfigured by soft and on-the-fly so we can decide
at any time which DSP will send data to other DSPs
- Are all the above points understood ? or is there something wrong ?
- Are all the above points correct for AD DSPs and TI DSPs ?
Thanks to all
J |
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Al Clark
Guest
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| Posted:
Wed Dec 29, 2004 7:46 pm Post subject:
Re: Understanding the TDM Multichannel protocol |
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email.trash@caramail.com (Jerome) wrote in
news:64c78a71.0412290411.368cbd75@posting.google.com:
| Quote: | Hi
We have a project featuring 4 DSPs interconnected via a TDM protocol,
the DSP choice is not completely decided, we are oscillating between
the AD21262 and the TMS320C6713
The 4 DSPs need to exchange audio data via the TDM lines, we would be
able to decide by soft which DSPs send data to another DSPs
I've some questions about the TDM multichannel protocol, I assume here
both AD and TI DSPs have to same TDM features (if wrong please let me
know).
From what I understand about the TDM bus, could you please confirm the
following points :
- One DSP (lets say the master) generate both Frame sync FS and bit
clock SCLK to all 3 other DSPs (lets say the slaves)
- we configure by soft each DSP to send data at a given TDM time slot
- when a DSP is not set up to send data on a given time slot, its TDM
data output is automaticaly tri-stated so there are no conflict with
the other DSPs
- The above mechanism allows to interconnect all DSPs together without
adding any glue
- Each DSP can be reconfigured by soft and on-the-fly so we can decide
at any time which DSP will send data to other DSPs
- Are all the above points understood ? or is there something wrong ?
- Are all the above points correct for AD DSPs and TI DSPs ?
Thanks to all
J
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I think you have it for the ADSP-21262.
You probably should place small resistors in series near the driving end of
each line. If the DSPs are separated more than a few inches (like a card
cage), I would use LVDS buffers to connect them. This recommendation would
be true for both DSPs.
The 21262 has very good peripheral support for serial communications. In C,
the two processors are about the same speed. You can use pin compatible
2136x parts for higher speed. If you code in assembly, which is very
practical and easy on the SHARC, you can execute code much faster than the
TI. Assembly language programming is very difficult with the TI.
My company are ADI partisans. We manufacture many boards based on the SHARC
including the 2126x & 2136x.
--
Al Clark
Danville Signal Processing, Inc.
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