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Niels Jørgen Kruse · Guest

I have been running some power measurements on my 1.8 GHz iMac.

First measurements at idle load:

Nap core clock(MHz) cpu temp (C) Voltage(V) Current(A) Watts(W)
on 900 30 11.63 0.64 7.44
on 900 40 11.66 0.66 7.70
on 900 50 11.72 0.68 7.97
on 900 60 11.72 0.70 8.20
on 1800 60 11.69 1.24 14.5
on 1800 65 11.69 1.26 14.7
off 900 60 11.67 1.20 14.0
off 1800 60 11.59 2.78 32.2
off 1800 70 11.57 2.80 32.4
off 1800 75 11.57 2.84 32.9

Measurements were made on the 12V side of the CPU voltage regulators, as
the iMac doesn't seem to have sensors on the low voltage side. The 30C
and 40C readings were made coming out of sleep; the low voltage is
probably due to the PSU being cold.

Looking only at the 60C results and assuming that leakage is unchanged
whether Nap is on or off, I solve the power equations to get a ratio of
1.24 between Vdd(900MHz) and Vdd(1800MHz). My guess is that Vdd(900MHz)
is 1.0V (+ epsilon) and Vdd(1800MHz) is 1.24V (or 1.25V). The lowest
workable Vdd for the current 970FX is 1.0V and the 2.5GHz PowerMac is
running at 1.25V in the 2.0GHz state according to this screenshot:
<http://www.3ddev.com/pub/Ars/2004-09-11-1721_G5_Sensors_Display_1.png>

Next I ran some benchmarks at 1800MHz and Nap enabled.

Running Dhrystone 2.1, power was fairly constant, reaching a maximum (as
cpu temperature increased) of 11.57V * 3.02A = 34.9W.

Running Flops 2.0, power changed in steps according to the subtest, the
lowest step was 11.57V * 2.77A = 32.0W and the highest was 11.57V *
3.00A = 34.7W.

In an attempt to get some readings that are comparable to previously
published results, I have run the "hot" loop from this paper:
<http://domino.watson.ibm.com/library/cyberdig.nsf/papers/E6EBD3C859FB49
F785256ED8006A3F4A/$File/rc23276.pdf>

In my code it looks like this:

#define SIZE (8192 / sizeof(double))

double hot (int iter, double *a) {
int i,j;
double d = 0;

for(i=0; i<iter; i++) {
for(j=0; j<SIZE; j++) {
d += a[j]*i + a[j+1]*(i-1);
}
}
return d;
}

I don't know what compiler and flags were used in the above paper, but
with "gcc -fast" the loop bogs down on dependencies, only getting 0.643
GFLOPS. Power peaked at 11.57V * 2.99A = 34.6W, less than Dhrystone.

To break the dependencies, I rewrote the loop - confidently naming it
hotter:

#define SIZE (8192 / sizeof(double))

double hotter (int iter, double *a) {
int i,j;
register double
d1,d2,d3,d4,d5,d6,d7,d8,d9,d10,d11,d12,d13,d14,d15,d16;

d1=d2=d3=d4=d5=d6=d7=d8=d9=d10=d11=d12=d13=d14=d15=d16 = 0;
for(i=0; i<iter; i++) {
for(j=0; j<SIZE; j+=8) {
d1 += a[j]*i;
d2 += a[j+1]*(i-1);
d3 += a[j+1]*i;
d4 += a[j+2]*(i-1);
d5 += a[j+2]*i;
d6 += a[j+3]*(i-1);
d7 += a[j+3]*i;
d8 += a[j+4]*(i-1);
d9 += a[j+4]*i;
d10 += a[j+5]*(i-1);
d11 += a[j+5]*i;
d12 += a[j+6]*(i-1);
d13 += a[j+6]*i;
d14 += a[j+7]*(i-1);
d15 += a[j+7]*i;
d16 += a[j+8]*(i-1);
}
}
return ( ((d1+d2)+(d3+d4)) + ((d5+d6)+(d7+d8)) ) +
( ((d9+d10)+(d11+d12)) + ((d13+d14)+(d15+d16)) );
}

This loop did run faster, cranking out 5.03 GFLOPS, but power was
/lower/ - peaking at 11.57V * 2.89A = 33.4W. It looks like instructions
sitting in issue queues consume more power than the same instructions
being executed.

--
Mvh./Regards, Niels Jørgen Kruse, Vanløse, Denmark

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