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Posted: Thu Jul 21, 2005 11:34 pm    Post subject: Designing my own architecture to be simulated in software - Reply with quote

Hi. I'm a 17 year old student, I'm about go to university in September.
After the first year, I'll be going into Computer Science or Electronic
and Computer Engineering depending on the preferences I develop in the
first year.

I thought it'd be an interesting idea to pick up some books on digital
design and try to simulate my own architecture in the Python
programming language, without relying on the features of the language
at all. Essentially, I want the code to be transparent for real-world
application so I defined the most basic construct as a NAND gate and
started building on top of that.

Right now I have constructs for a signed adder/subtractor, an
encoder/decoder, and registers made from D-flops. I've gotten to the
point where I need to define clear goals for the project so I can just
focus on the invidual parts of the implementation.

Word length is 32-bit, and the ALU and registers and memory conform to
the standard. Since I want to encode each instruction in only one word,
memory address range is limited to 16 bits. I figure 256KB should be
enough for anyone.

I/O is memory mapped, so I don't need special instructions for those. I
do plan to have graphical output, a 320x240 display with 1-bit color.
This will consume 960 bytes of address space, just to give an example.
I have plenty of room for expansion, and maybe I could even add a
"paper tape" device as permanent storage.

I'm reserving the HO byte of the word for the instruction type, so I
can theoretically have 256 different instructions though I plan to have
much less. The register operands are half-bytes in length, so I can
have a total of 16 registers in the core. The remaining 2 bytes allows
me to address the memory in operations that require it.

I'm very much a beginner, and the reason I undertook this project was
to learn as I go along. I don't have any practical experience with
assembly language, but I understand how it works and I have examined
the instructions for my iBook's PowerPC processor and the MIPS R3000
instruction set.

Unfortunately, experience is something that would be very helpful when
defining an instruction set. I need to know what I need to implement at
the hardware level, and what things I could piece together and simulate
in the assembler.

I'm pretty sure I can allocate 8 of the registers for general purposes,
and I'm allocating the other 8 for special purposes just in case. One
of them will contain the current instruction, one will contain the next
instruction, and one I can use as a pointer for returning from a
branched instruction.

Here's my instruction set so far. I would really appreciate some tips
as to what I could add or remove.

nop - no operation

add - store the sum of two registers in a register
sub - store the difference of two registers in a register

not - store not (contents of register X) in a register
and - store rX & rY in a register
or - store rX | rY in a register
xor - store rX ^ rY in a register
lsh - store rX << rY in a reg
rsh - store rX >> rY in a reg

jmp - jump to instruction at memory address mX
jeq - jump if rX == rY
jne - jump if not equal
jlt - jump if less than
jle - jump if less than or equal

bun - set Branch Return register to instruction below current, set Next
Instruction to mem address mX
beq - branch if equal
bne - branch if not equal
blt - branch if less than
ble - branch if less than or equal


Those of you with more experience in assembler, does this look like an
adequate instruction set for the hardware if I combine it with some
macros in the assembler? Any other tips?
Back to top
Stephen Fuld
Guest





Posted: Fri Jul 22, 2005 12:15 am    Post subject: Re: Designing my own architecture to be simulated in softwar Reply with quote

<altanorhon@gmail.com> wrote in message
news:1121970893.036673.69130@g44g2000cwa.googlegroups.com...
Quote:
Hi. I'm a 17 year old student, I'm about go to university in September.
After the first year, I'll be going into Computer Science or Electronic
and Computer Engineering depending on the preferences I develop in the
first year.

I thought it'd be an interesting idea to pick up some books on digital
design and try to simulate my own architecture in the Python
programming language, without relying on the features of the language
at all. Essentially, I want the code to be transparent for real-world
application so I defined the most basic construct as a NAND gate and
started building on top of that.

Right now I have constructs for a signed adder/subtractor, an
encoder/decoder, and registers made from D-flops. I've gotten to the
point where I need to define clear goals for the project so I can just
focus on the invidual parts of the implementation.

Word length is 32-bit, and the ALU and registers and memory conform to
the standard. Since I want to encode each instruction in only one word,
memory address range is limited to 16 bits. I figure 256KB should be
enough for anyone.

I/O is memory mapped, so I don't need special instructions for those. I
do plan to have graphical output, a 320x240 display with 1-bit color.
This will consume 960 bytes of address space, just to give an example.
I have plenty of room for expansion, and maybe I could even add a
"paper tape" device as permanent storage.

I'm reserving the HO byte of the word for the instruction type, so I
can theoretically have 256 different instructions though I plan to have
much less. The register operands are half-bytes in length, so I can
have a total of 16 registers in the core. The remaining 2 bytes allows
me to address the memory in operations that require it.

I'm very much a beginner, and the reason I undertook this project was
to learn as I go along. I don't have any practical experience with
assembly language, but I understand how it works and I have examined
the instructions for my iBook's PowerPC processor and the MIPS R3000
instruction set.

Unfortunately, experience is something that would be very helpful when
defining an instruction set. I need to know what I need to implement at
the hardware level, and what things I could piece together and simulate
in the assembler.

I'm pretty sure I can allocate 8 of the registers for general purposes,
and I'm allocating the other 8 for special purposes just in case. One
of them will contain the current instruction, one will contain the next
instruction, and one I can use as a pointer for returning from a
branched instruction.

Here's my instruction set so far. I would really appreciate some tips
as to what I could add or remove.

nop - no operation

add - store the sum of two registers in a register
sub - store the difference of two registers in a register

not - store not (contents of register X) in a register
and - store rX & rY in a register
or - store rX | rY in a register
xor - store rX ^ rY in a register
lsh - store rX << rY in a reg
rsh - store rX >> rY in a reg

jmp - jump to instruction at memory address mX
jeq - jump if rX == rY
jne - jump if not equal
jlt - jump if less than
jle - jump if less than or equal

bun - set Branch Return register to instruction below current, set Next
Instruction to mem address mX
beq - branch if equal
bne - branch if not equal
blt - branch if less than
ble - branch if less than or equal


Those of you with more experience in assembler, does this look like an
adequate instruction set for the hardware if I combine it with some
macros in the assembler? Any other tips?

I am certainly not an expert, but I can give you a few things to think
about.

Load and store instructions - to get things in and out of registers.

Do your arithmetic operations have things like carry flags?

Is the right shift you defined a logical shift (i.e. fills with zero's on
the left) or an arithmetic shift (fills with sign bits on the left). There
are uses for both.

Immediate operands? It is quite convenient to be able to specify at least
some operand values in the instruction stream.

From your description, instructions reference two registers. This means
that the destination of the operations must overlay one of the source
operands. There are reasons for doing this, but there are also reasons not
to.

Are you going to have a separate kernel and user mode? Doing so makes it
easier to have a more "secure" system (a program bug can't crash the system)
If so, you need instructions for getting between them.

That should keep you going for a while. Good luck!

--
- Stephen Fuld
e-mail address disguised to prevent spam
Back to top
JJ
Guest





Posted: Fri Jul 22, 2005 12:15 am    Post subject: Re: Designing my own architecture to be simulated in softwar Reply with quote

Hi altanor

Not a bad effort so far for someone that that hasn't technically
started Uni. The instruction set isn't too shabby, except for ld/st or
move, also load address or lea is usefull ie a load that gives address
of data reference, also usefull for a free scale since it gives addr =
base+index*scale (1,2,4 etc).
When you make out a list of opcodes, leave half the codes unused.

I'd suggest switching to plain C and not bother with Python or any
script languages. Eventually you will find that slows things down.

When you look at the operators in C expressions, write some examples
and hand compile them into your asm. You quickly find what you missed
out and don't need.

If you have an iMac you must have a compiler for Obj C which I am sure
can do plain C.

Also forget about nand gates, you don't really want to design at the
gate level until you have more experience. Thats just noise.

At this stage the PPC is probably too rich, older MIPs, ARM are easier
to grok

You can perfectly well describe a simple cpu as a plain forever loop
with a case switch to execute each opcode in turn and develop each
operator till it does the right thing. Once you have this behavioural C
model you can think about turning it into a HW design. Ofcourse you
will need to learn how to write an assembler for it too. The #define
can be used to convert symbols into hex codes so your simulator might
then use an int array initialized with literals that are #defined into
hex codes. Easier than writing assembler but not as nice.
ie int program[] = {
add R0 R1 R6 // R0 = R1+R6
ldb R5 R5 R7 // R5 = R5[R7]
}
#define add 0x1000, // maybe you get the idea
#define R0 0x0000
Then just combines these into word opcodes

You will soon find that FPGAs might be a way to actually make something
work and by the time you graduate, you won't be able to escape them or
C. The HW design tools are more or less free from xilinx and altera, a
starter board costs $100, with enough resources to do something more
than interesting. Xess and digilent will give you the board with fpga,
sram or dram, vga and ps conectors and lots of docs, examples. Once you
see Verilog or VHDL, you will see plenty of material on the web that
uses those to design cpus. Most any tutorial Verilog (or VHDL) book
describe precisely how to use the language to design a simple cpu and
learn about pipelining. They don't get into comp arch arguments over
the actual ISA design, they just try to get you running.


good luck

johnjakson at usa dotty com

You can also search for a few things
homebrew computers

classic computers

verilog or vhdl

http://www.fpgacpu.org/ // few changes for along time
http://www.fpga-faq.org/archives/
comp.arch.fpga often has chat about cpu in fpga but more now for
microblaze or nios

xilinx microblaze, altera nios
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Guest






Posted: Fri Jul 29, 2005 12:15 am    Post subject: Re: Designing my own architecture to be simulated in softwar Reply with quote

altanorhon@gmail.com wrote:
Quote:
Hi. I'm a 17 year old student, I'm about go to university in September.
After the first year, I'll be going into Computer Science or Electronic
and Computer Engineering depending on the preferences I develop in the
first year.

I am a graduate student studying comp arch.I have built a few computers

in C, behavioral HDL, and gate-level HDL. I will be happy to guide you
if you naad any help.


Quote:
I thought it'd be an interesting idea to pick up some books on digital
design and try to simulate my own architecture in the Python
programming language, without relying on the features of the language
at all. Essentially, I want the code to be transparent for real-world
application so I defined the most basic construct as a NAND gate and
started building on top of that.

Impressive.


Quote:
Right now I have constructs for a signed adder/subtractor, an
encoder/decoder, and registers made from D-flops. I've gotten to the
point where I need to define clear goals for the project so I can just
focus on the invidual parts of the implementation.


As someone already pointed out, building a machine from NAND gates is
hard. but Since you have the constructs already, might as well use
them. generally a top-down approch is better because it lets you
appreciate a lot of high level stuff. doing gate level to begin with
also adds an extra layer of debugging which can make life miserable. I
recomend that you do not design any further blocks. Just use the
language for now and later you can replace the language constructs with
your own blocks. This way you will not make any blocks that will not be
used.


Quote:
Word length is 32-bit, and the ALU and registers and memory conform to
the standard. Since I want to encode each instruction in only one word,
memory address range is limited to 16 bits. I figure 256KB should be
enough for anyone.

Fixed length Uniform decode is the way to go for a machine of this

size. I am not sure if I clearly understand this. How do you plan to
encode memory. You do not need to constraint your memory just for this
reason though. There are much better ways of doing it. Let me know if
you want me to elaborate this further.

Quote:
I/O is memory mapped, so I don't need special instructions for those. I
do plan to have graphical output, a 320x240 display with 1-bit color.
This will consume 960 bytes of address space, just to give an example.
I have plenty of room for expansion, and maybe I could even add a
"paper tape" device as permanent storage.

Your call.


Quote:
I'm reserving the HO byte of the word for the instruction type, so I
can theoretically have 256 different instructions though I plan to have
much less. The register operands are half-bytes in length, so I can
have a total of 16 registers in the core. The remaining 2 bytes allows
me to address the memory in operations that require it.

like I said, not every instruction is a memory instruction so I would

not reserve bits in the iWord for memory. There are better ways to do
this.

Quote:
I'm very much a beginner, and the reason I undertook this project was
to learn as I go along. I don't have any practical experience with
assembly language, but I understand how it works and I have examined
the instructions for my iBook's PowerPC processor and the MIPS R3000
instruction set.

Indeed, you have done a wonderful job.


Quote:
Unfortunately, experience is something that would be very helpful when
defining an instruction set. I need to know what I need to implement at
the hardware level, and what things I could piece together and simulate
in the assembler.

As I said, just bug me whenever you want. This project interests me. so

never hesitate. I know that I will probably learn from this project too
so it will be for my benefit.

Quote:
I'm pretty sure I can allocate 8 of the registers for general purposes,
and I'm allocating the other 8 for special purposes just in case. One
of them will contain the current instruction, one will contain the next
instruction, and one I can use as a pointer for returning from a
branched instruction.

Dont do that. I dont think you should have special purpose registers

ISA visible. The programmer should not have write priveleges to those
register through add/sub like instructions. They should only be
written/read by special instructions like branch, jump, return etc.
This is just my personal opinion.


Quote:
Here's my instruction set so far. I would really appreciate some tips
as to what I could add or remove.

nop - no operation

yup.
add - store the sum of two registers in a register
sub - store the difference of two registers in a register

as someone pointed out, carry/overflow flags can be useful.


Quote:
not - store not (contents of register X) in a register
and - store rX & rY in a register
or - store rX | rY in a register
xor - store rX ^ rY in a register
lsh - store rX << rY in a reg
rsh - store rX >> rY in a reg

jmp - jump to instruction at memory address mX
jeq - jump if rX == rY
jne - jump if not equal
jlt - jump if less than
jle - jump if less than or equal

this reminds me that you have not talked about condition code registers

and status registers at all. how are you planing to do that?

Quote:
bun - set Branch Return register to instruction below current, set Next
Instruction to mem address mX
beq - branch if equal
bne - branch if not equal
blt - branch if less than
ble - branch if less than or equal


Those of you with more experience in assembler, does this look like an
adequate instruction set for the hardware if I combine it with some
macros in the assembler? Any other tips?

It is a good one. in fact you simplify a bit. you need a return
instructions. I think you should get rid of bun, and have a pair of
instruction called CALL/RETURN . The call can just be unconditional.

Good luck ,
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