| Author |
Message |
acthom
Guest
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 Posted:
Mon Aug 08, 2005 3:54 pm Post subject:
Opteron hypertransport interface |
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Hi, all,
The AMD tech docs said that an Opteron cpu has three Hypertransport links,
two for communication with other cpus, one for communication with the
north-bridge chip. I want to know the tech details of how AMD Opteron
cpus use such Hypertransport links. Does AMD make such info open? How
could I get them?
Thx in advance. |
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Colonel Forbin
Guest
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| Posted:
Mon Aug 08, 2005 10:50 pm Post subject:
Re: Opteron hypertransport interface |
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In article <dd7dic$mfb$1@news.yaako.com>,
acthom <acthom@not.real.address> wrote:
| Quote: |
The AMD tech docs said that an Opteron cpu has three Hypertransport links,
two for communication with other cpus, one for communication with the
north-bridge chip. I want to know the tech details of how AMD Opteron
cpus use such Hypertransport links. Does AMD make such info open? How
could I get them?
|
Not that it's all that easy in today's more isolated business
management, but you might try simply asking them, assuming you
can manage to get past the shields of "customer service" people. |
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Casper H.S. Dik
Guest
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| Posted:
Tue Aug 09, 2005 12:00 am Post subject:
Re: Opteron hypertransport interface |
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forbin@dev.nul (Colonel Forbin) writes:
| Quote: | In article <dd7dic$mfb$1@news.yaako.com>,
acthom <acthom@not.real.address> wrote:
The AMD tech docs said that an Opteron cpu has three Hypertransport links,
two for communication with other cpus, one for communication with the
north-bridge chip. I want to know the tech details of how AMD Opteron
cpus use such Hypertransport links. Does AMD make such info open? How
could I get them?
Not that it's all that easy in today's more isolated business
management, but you might try simply asking them, assuming you
can manage to get past the shields of "customer service" people.
|
Or look at their web site and follow links, to, e.g.,
http://www.hypertransport.org/tech/tech_specs.cfm
Casper
--
Expressed in this posting are my opinions. They are in no way related
to opinions held by my employer, Sun Microsystems.
Statements on Sun products included here are not gospel and may
be fiction rather than truth. |
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Del Cecchi
Guest
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| Posted:
Tue Aug 09, 2005 12:16 am Post subject:
Re: Opteron hypertransport interface |
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Colonel Forbin wrote:
| Quote: | In article <dd7dic$mfb$1@news.yaako.com>,
acthom <acthom@not.real.address> wrote:
The AMD tech docs said that an Opteron cpu has three Hypertransport links,
two for communication with other cpus, one for communication with the
north-bridge chip. I want to know the tech details of how AMD Opteron
cpus use such Hypertransport links. Does AMD make such info open? How
could I get them?
Not that it's all that easy in today's more isolated business
management, but you might try simply asking them, assuming you
can manage to get past the shields of "customer service" people.
Have you read the manuals available at the amd web site? The cpu to cpu |
links carry coherence and non local memory data traffic, while the I/O
link carries (surprise) I/O traffic.
--
Del Cecchi
"This post is my own and doesn’t necessarily represent IBM’s positions,
strategies or opinions.” |
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Dan Koren
Guest
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| Posted:
Tue Aug 09, 2005 12:16 am Post subject:
Re: Opteron hypertransport interface |
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|
"Del Cecchi" <cecchinospam@us.ibm.com> wrote in message
news:3lpr10F1438jrU1@individual.net...
| Quote: | Colonel Forbin wrote:
In article <dd7dic$mfb$1@news.yaako.com>,
acthom <acthom@not.real.address> wrote:
The AMD tech docs said that an Opteron cpu has three Hypertransport
links, two for communication with other cpus, one for communication with
the
north-bridge chip. I want to know the tech details of how AMD Opteron
cpus use such Hypertransport links. Does AMD make such info open? How
could I get them?
Not that it's all that easy in today's more isolated business
management, but you might try simply asking them, assuming you
can manage to get past the shields of "customer service" people.
Have you read the manuals available at the amd web site? The cpu to cpu
links carry coherence and non local memory data traffic, while the I/O
link carries (surprise) I/O traffic.
|
Should one read between the lines that I/O
traffic is not cache coherent, or did you
merely skip one word?
dk |
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Colonel Forbin
Guest
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| Posted:
Tue Aug 09, 2005 8:15 am Post subject:
Re: Opteron hypertransport interface |
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In article <42f7abc6$0$11065$e4fe514c@news.xs4all.nl>,
Casper H.S. Dik <Casper.Dik@Sun.COM> wrote:
| Quote: |
forbin@dev.nul (Colonel Forbin) writes:
In article <dd7dic$mfb$1@news.yaako.com>,
acthom <acthom@not.real.address> wrote:
The AMD tech docs said that an Opteron cpu has three Hypertransport links,
two for communication with other cpus, one for communication with the
north-bridge chip. I want to know the tech details of how AMD Opteron
cpus use such Hypertransport links. Does AMD make such info open? How
could I get them?
Not that it's all that easy in today's more isolated business
management, but you might try simply asking them, assuming you
can manage to get past the shields of "customer service" people.
Or look at their web site and follow links, to, e.g.,
http://www.hypertransport.org/tech/tech_specs.cfm
|
Assuming of course that the developers of the web site haven't made
unwarranted assumptions about the ubiquity of MS Internet Explorer
and related tools... |
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Casper H.S. Dik
Guest
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| Posted:
Tue Aug 09, 2005 2:03 pm Post subject:
Re: Opteron hypertransport interface |
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forbin@dev.nul (Colonel Forbin) writes:
| Quote: | Or look at their web site and follow links, to, e.g.,
http://www.hypertransport.org/tech/tech_specs.cfm
Assuming of course that the developers of the web site haven't made
unwarranted assumptions about the ubiquity of MS Internet Explorer
and related tools...
|
Looks just fine with Mozilla.
Casper
--
Expressed in this posting are my opinions. They are in no way related
to opinions held by my employer, Sun Microsystems.
Statements on Sun products included here are not gospel and may
be fiction rather than truth. |
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Andi Kleen
Guest
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| Posted:
Tue Aug 09, 2005 4:16 pm Post subject:
Re: Opteron hypertransport interface |
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"Dan Koren" <dankoren@yahoo.com> writes:
| Quote: |
Should one read between the lines that I/O
traffic is not cache coherent, or did you
merely skip one word?
|
It has weaker cache coherency than CPU traffic.
CPU traffic has the full MOESI state machine with shared
cache lines etc. (two CPUs can read the same data at the
same time). IO traffic just sniffs and invalidates.
They're both coherent, but one is much faster in many
cases than the other.
-Andi |
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Dan Koren
Guest
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| Posted:
Wed Aug 10, 2005 12:15 am Post subject:
Re: Opteron hypertransport interface |
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"Andi Kleen" <freitag@alancoxonachip.com> wrote in message
news:p733bpjmgk9.fsf@verdi.suse.de...
| Quote: | "Dan Koren" <dankoren@yahoo.com> writes:
Should one read between the lines that I/O
traffic is not cache coherent, or did you
merely skip one word?
It has weaker cache coherency than CPU traffic.
CPU traffic has the full MOESI state machine with shared
cache lines etc. (two CPUs can read the same data at the
same time). IO traffic just sniffs and invalidates.
They're both coherent, but one is much faster in many
cases than the other.
|
OK, thanks for the info.
dk |
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