VCCO on bank 0
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VCCO on bank 0

 
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Jane
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Posted: Thu Jan 06, 2005 4:32 am    Post subject: VCCO on bank 0 Reply with quote
Hi, all,

I got a "The IO standards specified for IOs in Bank0 are not VCCO compatible" error when I ran DRC in the PACE, which I wasn't expecting under my pin assignments. My IOs in bank0 were all specified as LVCMOS33. I am using WebPack 6.3i with SP3. The FPGA is XC3S1000-5-FG456.

I tried LVCMOS25, then the DRC passed. But I didn't specify the VCCO as 2.5V in PACE. Actually I don't know whether we can specity the VCCO voltage in PACE at all.

Could anybody help to figure out or just shed some light on. :)

TIA,

Jane
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