mag
Guest
|
Posted:
Tue Aug 23, 2005 8:15 am Post subject:
Re: Soc Design career question |
|
|
On 2005-08-14 07:01:57 -0700, abc123itsme2002@yahoo.com said:
| Quote: | hi all
Im a frsh grad BE electronics and am working with a top semi compnay. i
have been offered the synthesis and timing
team out here.
Now my long term interests are in embedded systems /
comp arch / comp engineering ..stuff like
microprocessors etc. i may
even apply for my MS in these fields in an year or 2. with
that in mind , i have a few questions ...
1)Will my current field ( Synthesis and timing ) help
me
- enhance my knowledge in these fields
- get a good admit into an MS course of my choice , or
will somethign like verification be better ( i have
been given a choice between the S&T and
verification
|
I've been in the VLSI/semiconductors industry as a design engineer for
a little over 8 years. I've done some synthesis, lot's of pre-silicon
verification of CPU's and other ASIC/SoC interface logic, some RTL
logic design, and very little architecture.
I work for one of the larger semiconductor product manufacturers so my
feedback is from that perspective. People on the projects that I've
worked on who did synthesis had very little to no knowledge of the
microarchitecture or architecture of the product they were
synthesizing. Because of the sheer size of the designs the synthesis
people had very little or no time to learn any microarchtiecture of the
deisgn, and even if they did, they couldn't do much about it because
any microarch problems that may find would require modifying hundreds
of thousands of lines of HDL code that they didn't write and that was
only sparsely documented.
So my opinion is if you're on one of these types of projects, do
synthesis for 1 or 2 (if you want to become an expert, otherwise do
just one and move on) projects and move onto something else, preferably
logic design. I would prefer a logic design position where you get to
write the microarchitectural specification/architectural specification
and where YOU own and put together the schedule for your part of your
work. My second choice would be to take the role of a dumb coder who
just takes someone else's spec and schedule and makes due with it.
If you can't get the dumb coder role or the true microarchitect role,
then my second choice would be pre-silicon verification. I say
pre-silicon , because post-silicon verification is not much of a design
position and doesn't sound like what you're interested in doing.
Ideally, the person who does pre-silicion verification knows as much
about the design as the original designer/architect/microarchitect. In
my experience they know up to 80% as much as the architect, and that's
with lots of hard work and combing through HDL code if the
arch/microarch/design spec is not available.
The upside of verification is that you oftentimes have to write what
are called "transactors," or "bus functional models." The reason why
this is a good thing is because these roles can often become very
similar to the above logic design role. This is because you get tot
write HDL/C code that implements the same logic HW functions in the
original RTL logic that goes into the silicon. This is probably the
best verification role to have if one wishes to grow into the
microarchitecture role in the future, IMHO.
Another thing that I hear may be good to do (I haven't done it yet) is
to take a board-level system engineering role. This is a good thing to
do if you want to have a more "top-down" feel for how chip-level
features affect system level characteristics.
| Quote: |
2) Is it easy , or for that matter possiuble to get
into a course that is not exactly what u have been
doing for the past 2 years (say into comp arch course
from doing layout or even timing for that matter?)..i
am concerned coz i would need a schol
BTW how close to arch/micrP is Synthesis,compared to
verification?
|
Stay away from layout. Unless you're in a small company that can't
afford to higher mask designers. But if you've never layed out
anything try to get some exposure to it. Don't do layout for more than
6 months, IMHO, otherwise you will become bored to death (and probably
overworked to death too, as other design people rely upon your skill in
this area). If you do APR layout, then from what I've seen you'll be
spending most of your time fidling with the tool and very little on
anything design related. This is basically a big PERL/C/Tk programming
job desguised as a VLSI engineering job.
I would say timing roles that I've been exposed to encounter the same
sort experience with the design that synthesis and APR people do, very
little arch knowledge and very little opportunity to acquire much arch
knowledge about the design under consideration. Try to do this for only
1 project (preferably on the medium to small sized part of the project)
unless you want to become a timing expert.
Pre-silicon verification is much closer to arch/micrP than synthesis in
my world. Maybe in a smaller company where they rely upon the same
engineer who writes the RTL to do the back-end implementation this
situation may be different.
| Quote: |
3) will experience in Syn and Timing give me some sort
of an edge further in my career moving into embedded
systems/ arch , which is closer to verification since
you would need to know the arch of your chip all the
time.. or do i run a risk of being jack of all master
of none since i would be away from arch for 2
years?(would i?)
|
If you have a significant embedded systems/arch experience, then the
Syn and Timing experience will demonstrate that you're a well rounded
engineer. However I've met architects who didn't know whether the
processor they were working with had a branch delay slot or not, so
depending upon what kind of company you're working for, being well
rounded may not matter much.
| Quote: | 4) now im seeking out more from industry experienced people
...the situation is that i am in a relatively new group .the group head
wil be directly mentoring
me in synthesiss , whereas the verification team will
habve 15 more people , all of whom will be more
experience that me.. so career wise , where would it
be wiser to stay
If the design you're working on is very interesting and if you can get |
a very interesting piece of the chip to verify, then I would do
vericiation over synthesis. Unfoturnately you have to make a choice and
cannot opt to do both on the same part of the chip, which leads me to
believe you work on a big project with probably over 100 engineers. But
choosing a group to work in has so many other variables that I can't
give you a well informed answer, you'll have to look at the whole
picture (the personality of the people, the boss, the pay, the work
schedule, working environment, etc.) to make a good decision.
5) again , is it easioer moving into verification
| Quote: | (since there r more people in ver) than moving into
Syn & timign?
If you know what you're doing I don't see why it would be hard to move
from one job to the next. If you know how to do timing the way they
want you to, you should be OK. If you know how to verify how they want
you to verify, you should be OK.
|
SOrry for the deluge of questions ...if they seem
| Quote: | confusing...they just reflect my state of mind..
Sorry if my answers are long winded, just trying to give you some guidelines.
|
please reply soon , i need to mke my decision
| Quote: | by tuesday ..Thanks a lot
VLSIFRESHER
Crud, I'm too late...better luck next time, I guess.... |
|
|