| Author |
Message |
s.subbarayan
Guest
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 Posted:
Tue Dec 07, 2004 5:04 pm Post subject:
Testing NVRAM and FLASH-Need a test strategy |
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Dear gurus,
Can you advice me how to test FLASH and NVRAM Memory using C
language?I am not aware what should be the methodology I must be
using.Further,for testing the flash,do i need flash programmer?Or what
hardware setup is required to test NVRAM and FLASH?Typically My h/w
has got a NVRAM and a flash and I am asked to develop some software
based on C language to test these Mem chips.Need some ideas or links
where I can find some info regarding this.Also please advice me on the
h/w and s/w environment required to test these mem chips.
Advanced thanks to all your replys.
Regards,
s.subbarayan |
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Jack Klein
Guest
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| Posted:
Wed Dec 08, 2004 7:12 am Post subject:
Re: Testing NVRAM and FLASH-Need a test strategy |
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On 7 Dec 2004 04:04:44 -0800, s_subbarayan@rediffmail.com
(s.subbarayan) wrote in comp.arch.embedded:
| Quote: | Dear gurus,
Can you advice me how to test FLASH and NVRAM Memory using C
language?I am not aware what should be the methodology I must be
using.Further,for testing the flash,do i need flash programmer?Or what
hardware setup is required to test NVRAM and FLASH?Typically My h/w
has got a NVRAM and a flash and I am asked to develop some software
based on C language to test these Mem chips.Need some ideas or links
where I can find some info regarding this.Also please advice me on the
h/w and s/w environment required to test these mem chips.
Advanced thanks to all your replys.
Regards,
s.subbarayan
|
That depends on the kind of test you need to do. The only real way to
test these sorts of devices is to write different patterns into them,
then read them back. The test patterns overwrite the original data in
the devices. If you need to preserve that data, you have to read it
first and store it somewhere else while you are testing the device,
then write it back into the device at the end.
As for what sort of hardware and software you need to do the testing,
that depends on what type of system you are testing. Where are these
devices? On what kind of board, with what kind of processor? Do you
need to run the test code on the board's processor? Does the board
have enough memory to store the data from blocks or sectors of these
devices while you test them?
I would suggest you start with the chip maker's data sheet for the
particular devices. They usually include detailed lists of the steps
to erase, program, and verify them. In some cases, they might even
provide sample software, but that is rather rare.
By the way, 'NVRAM' is a term used for so many different things that
by itself it is meaningless. Some people even use it for devices like
EEPROMs, where there is no actual RAM involved. You need to be more
specific.
--
Jack Klein
Home: http://JK-Technology.Com
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Jeroen
Guest
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| Posted:
Sun Dec 12, 2004 10:31 am Post subject:
Re: Testing NVRAM and FLASH-Need a test strategy |
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"Jack Klein" <jackklein@spamcop.net> wrote in message
news:3eocr0949qg1j382op51u7ijfvdnspf470@4ax.com...
| Quote: | On 7 Dec 2004 04:04:44 -0800, s_subbarayan@rediffmail.com
(s.subbarayan) wrote in comp.arch.embedded:
Dear gurus,
Can you advice me how to test FLASH and NVRAM Memory using C
language?I am not aware what should be the methodology I must be
using.Further,for testing the flash,do i need flash programmer?Or what
hardware setup is required to test NVRAM and FLASH?Typically My h/w
has got a NVRAM and a flash and I am asked to develop some software
based on C language to test these Mem chips.Need some ideas or links
where I can find some info regarding this.Also please advice me on the
h/w and s/w environment required to test these mem chips.
Advanced thanks to all your replys.
Regards,
s.subbarayan
|
try this article http://www.ganssle.com/testingram.pdf
| Quote: | By the way, 'NVRAM' is a term used for so many different things that
by itself it is meaningless. Some people even use it for devices like
EEPROMs, where there is no actual RAM involved. You need to be more
specific.
|
There are some NVRAMS that consist of regular SRAM _and_ EEPROM cells. When
power drops, it quickly copies data from SRAM to EEPROM (an external
capacitor provides the energy for that) and at power up it copies the data
from EE back to the SRAM.
Jeroen |
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