| Author |
Message |
Oliver S.
Guest
|
 Posted:
Tue Oct 25, 2005 7:10 am Post subject:
CPU-charactristics searched |
|
|
I'm searching for the page-size and cacheline-size characteristics of
current desktop, workstation and server CPUs. Some of my interests are
whether there are current CPUs with cachelines below 64 bytes or above
128 bytes and if it might make sense to go beyond (I think it absolutely
doesn't make sense). |
|
| Back to top |
|
 |
Seongbae Park
Guest
|
| Posted:
Thu Oct 27, 2005 11:14 pm Post subject:
Re: CPU-charactristics searched |
|
|
Dysthymicdolt@aol.com <Dysthymicdolt@aol.com> wrote:
| Quote: | Below is a small set of mostly older data that I happen to
have more or less at hand.
ISA Product I/Dcache size L1 block L2 Size L2 block L3 size L3
block
PPC SStar 128KiB/128KiB 128B 16MiB 128B N/A
N/A
PPC POWER4 64KiB/32KiB 128B 1.5MiB 128B 32MiB
512B
PPC POWER5 64KiB/32KiB 128B 1.875MiB 128B 36MiB
256B
PPC M7450 32KiB/32KiB 32B 256KiB 64B 2MiB
128B
PPC M7450 " " " " 1MiB
64B
Sparc US IIIi 32KiB/64KiB 32B 1MiB 64B N/A
N/A
Sparc Niagara 16KiB/8KiB 32B/16B 3MiB 64B N/A
N/A
x86 Pentium4 8KiB (D) 64B 256KiB 128B N/A
N/A
IPF Itanium2 16KiB/16KiB 64B 256KiB 128B 3MiB
128B
Alpha 21364 64KiB/64KiB 64B? 1.75MiB 64B? N/A
N/A
PowerPC page size: 4KiB (16MiB in POWER4/5)
Sparc page size: 8KiB, 64KiB, 512KiB, 4MiB
x86 page size: 4KiB, 2/4MiB
IPF page size: 4KiB, 8KiB, 16KiB, 64KiB, 256KiB, 1MiB, 4MiB, 16MiB,
64MiB, 256MiB, 4GiB
Alpha page size: 8KiB (with 64KiB, 512KiB, 4MiB groupings)
64KiB (with 2MiB, 64MiB, 512MiB groupings)
[boot-time selectable base page size]
Obviously POWER4's large L3 block size was influenced by the desire
to have the tags on-chip, but POWER5 still has 256B L3 blocks.
|
US4+ page size: 8K, 64k, 512k, 4M, 32M, 2G
Niagara : 8k, 64k, 4M, 2G
US4+ has 32M L3 with 64B line size and L3 tag is on-chip.
--
#pragma ident "Seongbae Park, compiler, http://blogs.sun.com/seongbae/" |
|
| Back to top |
|
|
Seongbae Park
Guest
|
| Posted:
Thu Oct 27, 2005 11:19 pm Post subject:
Re: CPU-charactristics searched |
|
|
Seongbae Park <Seongbae.Park@Sun.COM> wrote:
....
| Quote: | US4+ page size: 8K, 64k, 512k, 4M, 32M, 2G
Niagara : 8k, 64k, 4M, 2G
|
Correction: 2G -> 256M
Basically *8 for each step.
--
#pragma ident "Seongbae Park, compiler, http://blogs.sun.com/seongbae/" |
|
| Back to top |
|
|
Guest
|
| Posted:
Fri Oct 28, 2005 12:15 am Post subject:
Re: CPU-charactristics searched |
|
|
Below is a small set of mostly older data that I happen to
have more or less at hand.
ISA Product I/Dcache size L1 block L2 Size L2 block L3 size L3
block
PPC SStar 128KiB/128KiB 128B 16MiB 128B N/A
N/A
PPC POWER4 64KiB/32KiB 128B 1.5MiB 128B 32MiB
512B
PPC POWER5 64KiB/32KiB 128B 1.875MiB 128B 36MiB
256B
PPC M7450 32KiB/32KiB 32B 256KiB 64B 2MiB
128B
PPC M7450 " " " " 1MiB
64B
Sparc US IIIi 32KiB/64KiB 32B 1MiB 64B N/A
N/A
Sparc Niagara 16KiB/8KiB 32B/16B 3MiB 64B N/A
N/A
x86 Pentium4 8KiB (D) 64B 256KiB 128B N/A
N/A
IPF Itanium2 16KiB/16KiB 64B 256KiB 128B 3MiB
128B
Alpha 21364 64KiB/64KiB 64B? 1.75MiB 64B? N/A
N/A
PowerPC page size: 4KiB (16MiB in POWER4/5)
Sparc page size: 8KiB, 64KiB, 512KiB, 4MiB
x86 page size: 4KiB, 2/4MiB
IPF page size: 4KiB, 8KiB, 16KiB, 64KiB, 256KiB, 1MiB, 4MiB, 16MiB,
64MiB, 256MiB, 4GiB
Alpha page size: 8KiB (with 64KiB, 512KiB, 4MiB groupings)
64KiB (with 2MiB, 64MiB, 512MiB groupings)
[boot-time selectable base page size]
Obviously POWER4's large L3 block size was influenced by the desire
to have the tags on-chip, but POWER5 still has 256B L3 blocks. |
|
| Back to top |
|
|
Sander Vesik
Guest
|
| Posted:
Fri Oct 28, 2005 3:27 am Post subject:
Re: CPU-charactristics searched |
|
|
Seongbae Park <Seongbae.Park@sun.com> wrote:
| Quote: |
US4+ page size: 8K, 64k, 512k, 4M, 32M, 2G
Niagara : 8k, 64k, 4M, 2G
US4+ has 32M L3 with 64B line size and L3 tag is on-chip.
|
This is new - any idea when processor handbooks detailing the
processors and esp teh extra page sizes will be publicly avilable?
--
Sander
+++ Out of cheese error +++ |
|
| Back to top |
|
|
David Kanter
Guest
|
| Posted:
Fri Oct 28, 2005 8:15 am Post subject:
Re: CPU-charactristics searched |
|
|
POWER5+ adds 16GB pages...
David |
|
| Back to top |
|
|
Niels Jørgen Kruse
Guest
|
| Posted:
Fri Oct 28, 2005 2:49 pm Post subject:
Re: CPU-charactristics searched |
|
|
<Dysthymicdolt@aol.com> wrote:
| Quote: | PowerPC page size: 4KiB (16MiB in POWER4/5)
|
POWER5+ adds 64KB and 16 GB page sizes.
--
Mvh./Regards, Niels Jørgen Kruse, Vanløse, Denmark |
|
| Back to top |
|
|
Seongbae Park
Guest
|
| Posted:
Fri Oct 28, 2005 5:01 pm Post subject:
Re: CPU-charactristics searched |
|
|
Sander Vesik <sander@haldjas.folklore.ee> wrote:
| Quote: | Seongbae Park <Seongbae.Park@sun.com> wrote:
US4+ page size: 8K, 64k, 512k, 4M, 32M, 2G
Niagara : 8k, 64k, 4M, 2G
US4+ has 32M L3 with 64B line size and L3 tag is on-chip.
This is new - any idea when processor handbooks detailing the
processors and esp teh extra page sizes will be publicly avilable?
|
Don't know about the official documentation schedule,
but you can get the info from opensolaris.
Google "site:opensolaris.org panther page size".
The first hit would be a link to the source of us3_common_mmu.c.
A similar search for niagara should find niagara.c.
BTW, I hope everyone sees my subsequent posting with 2G->256M correction...
--
#pragma ident "Seongbae Park, compiler, http://blogs.sun.com/seongbae/" |
|
| Back to top |
|
|
Guest
|
| Posted:
Fri Oct 28, 2005 9:31 pm Post subject:
Re: CPU-charactristics searched |
|
|
Seongbae Park wrote:
| Quote: | US4+ page size: 8K, 64k, 512k, 4M, 32M, 2G
Niagara : 8k, 64k, 4M, 2G
US4+ has 32M L3 with 64B line size and L3 tag is on-chip.
|
After a bit of research, I discovered the US IV has a
128B block size for 8MiB L2 (64B for 4MiB).
AMD64/Opteron apparently have 64B cache lines.
(It is surprisingly difficult to get this simple
information!) |
|
| Back to top |
|
|
|
|
|
|
FAQ
Memberlist
Register
Profile
Log in to check your private messages
Log in