Xilinx LVDS termination resistor
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Xilinx LVDS termination resistor

 
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Brad Smallridge
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Posted: Thu Dec 29, 2005 1:15 am    Post subject: Xilinx LVDS termination resistor Reply with quote

How do you turn the 100 ohm resistor on for an LVDS input?
I am using the HDR2 header on an ML402 dev board.

Brad Smallridge
aivision.com
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Brad Smallridge
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Posted: Thu Dec 29, 2005 1:15 am    Post subject: Re: Xilinx LVDS termination resistor Reply with quote

OK.
You add this to your UCF file:

INST cam1_x0_ibufd_inst DIFF_TERM = TRUE;
INST cam1_x1_ibufd_inst DIFF_TERM = TRUE;
INST cam1_x2_ibufd_inst DIFF_TERM = TRUE;
INST cam1_x3_ibufd_inst DIFF_TERM = TRUE;
INST cam1_xclk_ibufd_inst DIFF_TERM = TRUE;

"Brad Smallridge" <bradsmallridge@dslextreme.com> wrote in message
news:11r5ris939gc844@corp.supernews.com...
Quote:
How do you turn the 100 ohm resistor on for an LVDS input?
I am using the HDR2 header on an ML402 dev board.

Brad Smallridge
aivision.com
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Austin Lesea
Guest





Posted: Thu Dec 29, 2005 1:15 am    Post subject: Re: Xilinx LVDS termination resistor Reply with quote

Brad,

If the part has them (look in data sheet, or keep reading), it would be
the LVDS_DT IO primitive.

LVDS_DT_p for the + terminal, LVDS_DT_N for the - terminal of the diff
input pair.

Or, you should be able to see the button in FPGA Editor to turn the
termination ON (if it is in the part you have).

The ML402 is for the Virtex 4, and all V4 parts have the DT option.

Austin

Brad Smallridge wrote:

Quote:
How do you turn the 100 ohm resistor on for an LVDS input?
I am using the HDR2 header on an ML402 dev board.

Brad Smallridge
aivision.com

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Brad Smallridge
Guest





Posted: Thu Dec 29, 2005 1:15 am    Post subject: Re: Xilinx LVDS termination resistor Reply with quote

Hi Austin,

Can you spell this out for me a little clearer. I am a little slow.

I went to the FPGA editor to look at the inputs. There is a
connection from the N input to the P input. And an ouput
of the P going off to the rest of the fabric.

Going into the P input, I see a mark next to LVDS_25
and DIFF_TERM FALSE. Should DIFF_TERM be TRUE?
The software would not allow me to make a change.

I can not find LVDS_DT in the ISE7.1 online documentation
libraries guide.

Thanks for your help. This has been an issue for several days now.

Brad Smallridge
aivision.com


"Austin Lesea" <austin@xilinx.com> wrote in message
news:dourq1$h8e1@xco-news.xilinx.com...
Quote:
Brad,

If the part has them (look in data sheet, or keep reading), it would be
the LVDS_DT IO primitive.

LVDS_DT_p for the + terminal, LVDS_DT_N for the - terminal of the diff
input pair.

Or, you should be able to see the button in FPGA Editor to turn the
termination ON (if it is in the part you have).

The ML402 is for the Virtex 4, and all V4 parts have the DT option.

Austin

Brad Smallridge wrote:

How do you turn the 100 ohm resistor on for an LVDS input?
I am using the HDR2 header on an ML402 dev board.

Brad Smallridge
aivision.com
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Marc Randolph
Guest





Posted: Thu Dec 29, 2005 9:15 am    Post subject: Re: Xilinx LVDS termination resistor Reply with quote

Brad Smallridge wrote:
Quote:
Hi Austin,

Can you spell this out for me a little clearer. I am a little slow.

I went to the FPGA editor to look at the inputs. There is a
connection from the N input to the P input. And an ouput
of the P going off to the rest of the fabric.

Going into the P input, I see a mark next to LVDS_25
and DIFF_TERM FALSE. Should DIFF_TERM be TRUE?
The software would not allow me to make a change.

I can not find LVDS_DT in the ISE7.1 online documentation
libraries guide.

Thanks for your help. This has been an issue for several days now.

Howdy Brad,

Not surprising that you were confused by this. The below answer record
mentions that "DT" is available on V2Pro and V4. Except that on the
V4 it is invoked in an entirely different way than it is was on the
V2Pro:

http://www.xilinx.com/xlnx/xil_ans_display.jsp?getPagePath=17244

As you can see, you must use LVDS_25_DT for V2Pro, and you must use
DIFF_TERM attribute on your LVDS_25 on V4 - so if a design is
retargetted from V2Pro to V4, it would run into the exact same problem
that you did.

Have fun,

Marc
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