calaf
Joined: 09 Jun 2005
Posts: 7
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 Posted:
Tue Apr 11, 2006 9:21 am Post subject:
pspice model of FPGA LVCMOS33 |
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Hi all:
I have to load a FPGA pin with a resistor divider. The resistor divider gets 3.3V from 15V. The problem is that the voltages sources of 15V and 3.3V are not sequenced during power on, so I can have current problems in that pin during power on. I've been simulating with Pspice and the only solution seems to be placing an optocoupler between FPGA and resistor divider. The question with pspice is that the only model I have for Spartan-3 LVCMOS33 is HSpice and I had to replace it for a simple buffer. Is it acceptable? How can I adapt the HSpice model to Pspice? All attempts failed.
Any help is appreciated
Thanks in advance |
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