| Author |
Message |
Nick Maclaren
Guest
|
 Posted:
Tue Sep 27, 2005 10:59 pm Post subject:
On-current, voltage and GHz |
|
|
I am reading some of Mark Bohr's papers, and he keeps stressing
that on-current is a key to performance. Now, once upon a time,
I believe that MHz used to be more-or-less pro rata to voltage,
but things tend to change as you get down to the sub-micron process
level. So what I am looking for is a ROUGH idea of how on-current,
voltage and GHz are related.
Any assistance appreciated.
Regards,
Nick Maclaren. |
|
| Back to top |
|
 |
Klaus Fehrle
Guest
|
| Posted:
Wed Sep 28, 2005 1:55 pm Post subject:
Re: On-current, voltage and GHz |
|
|
Nick Maclaren schrieb:
| Quote: | I am reading some of Mark Bohr's papers, and he keeps stressing
that on-current is a key to performance.
|
Perfectly in accordance with current opionion. [sic :)]
Now, once upon a time, I believe that MHz used to be more-or-less pro
rata to voltage,
In times when the easiest way to gain performance was frequency scaling
you could get an approximation of MHz as a function of voltage (in fact
a square function). For a superficial explanation what is behind this,
you needed higher threshold voltages at the transistors to clock them
faster, requiring higher voltage supply. However digging deeper into
this you will end up with the finding the ultimate aim of all this is to
get more on-current into the chip - so it does not at all contradict
what Mark Bohr says.
but things tend to change as you get down to the sub-micron process level.
Yes, signficantly. And rapidly, as well.
So what I am looking for is a ROUGH idea of how on-current, voltage and
GHz are related.
I am afraid there simply is no such general approximations anymore. For
the voltage part, there is and will be several voltage islands in the
processor, consequently looking at _supply_ voltage is not meaningful
anymore.
For the current part, we are at a point where leakage currents are
higher than switching currents already. There are dozens of approaches
to deal with the various issues in this respect more or less successful.
Actually, it is even close to hopeless to make valid approximations for
one particular design in one particular node nowadays, e.g. for K8 in
the 90nm node: While in volume production for quite some time,
continuous process improvements change the equations you are looking at
continuously - i might add at an impressive pace.
So for the rough idea i'd suggest you take any rule of thumb suggested
in this respect for current processes with a grain of salt.
K. |
|
| Back to top |
|
|
Nick Maclaren
Guest
|
| Posted:
Wed Sep 28, 2005 2:18 pm Post subject:
Re: On-current, voltage and GHz |
|
|
In article <dhdlre$hae$00$1@news.t-online.com>,
Klaus Fehrle <FirstnameLastname@t-online.de> wrote:
| Quote: | Nick Maclaren schrieb:
I am reading some of Mark Bohr's papers, and he keeps stressing
that on-current is a key to performance.
Perfectly in accordance with current opionion. [sic :)]
|
Thanks. Well, we have a place to start :-)
| Quote: | So what I am looking for is a ROUGH idea of how on-current, voltage and
GHz are related.
I am afraid there simply is no such general approximations anymore. For
the voltage part, there is and will be several voltage islands in the
processor, consequently looking at _supply_ voltage is not meaningful
anymore.
|
I had rather deduced that - thanks for the confirmation.
| Quote: | For the current part, we are at a point where leakage currents are
higher than switching currents already. There are dozens of approaches
to deal with the various issues in this respect more or less successful.
Actually, it is even close to hopeless to make valid approximations for
one particular design in one particular node nowadays, e.g. for K8 in
the 90nm node: While in volume production for quite some time,
continuous process improvements change the equations you are looking at
continuously - i might add at an impressive pace.
|
Oh, heck. Thanks :-(
What it means is that I have no way to even guess what his papers
imply for performance as we shall see it. What I did manage to
deduce from search for subtle inconsistencies was the following:
The 65 nm process has hit at least some problems that were not
anticipated even in 2002/3, which will imply constraints on
designs and perhaps a minor delay. So what else is new?
There seems to be a near-insoluble choice between CPU power
and low electrical power, and it is likely that the multiple
core systems will have lower serial performance than the single
core ones (and not just initially).
I have been unable to find out anything useful about Intel's
ultra-low power process performance - 2x lower, 10x lower or
what? If it is only 2x, then the process looks VERY interesting
for multi-core work. If 10x, forget it for that.
There are hints of serious problems with lithography and other
issues at 45 nm, which may indicate that it will slip by at
least a year, perhaps two. But that is very much a tea-leaf
guess, and I wouldn't put money on it either way. |
|
| Back to top |
|
|
Klaus Fehrle
Guest
|
| Posted:
Wed Sep 28, 2005 4:15 pm Post subject:
Re: On-current, voltage and GHz |
|
|
Nick Maclaren schrieb:
| Quote: | In article <dhdlre$hae$00$1@news.t-online.com>,
Klaus Fehrle <FirstnameLastname@t-online.de> wrote:
Nick Maclaren schrieb:
I am reading some of Mark Bohr's papers, and he keeps stressing
that on-current is a key to performance.
Perfectly in accordance with current opionion. [sic :)]
Thanks. Well, we have a place to start :-)
So what I am looking for is a ROUGH idea of how on-current, voltage and
GHz are related.
I am afraid there simply is no such general approximations anymore. For
the voltage part, there is and will be several voltage islands in the
processor, consequently looking at _supply_ voltage is not meaningful
anymore.
I had rather deduced that - thanks for the confirmation.
For the current part, we are at a point where leakage currents are
higher than switching currents already. There are dozens of approaches
to deal with the various issues in this respect more or less successful.
Actually, it is even close to hopeless to make valid approximations for
one particular design in one particular node nowadays, e.g. for K8 in
the 90nm node: While in volume production for quite some time,
continuous process improvements change the equations you are looking at
continuously - i might add at an impressive pace.
Oh, heck. Thanks :-(
What it means is that I have no way to even guess what his papers
imply for performance as we shall see it. What I did manage to
deduce from search for subtle inconsistencies was the following:
The 65 nm process has hit at least some problems that were not
anticipated even in 2002/3, which will imply constraints on
designs and perhaps a minor delay. So what else is new?
|
Well there have been plenty of publications from 02/03 timeframe (U of
Tokyo was one of the sources e.g.) predicting exactly what we see now.
However, scene-shifters of reality (aka PR folks) had the upper hand
over the voices in the wilderness (aka scientifists), as usual. :) Otoh,
the publications back then included several suggestions of how to deal
with these challenges, and we see some of them working pretty well for
those designing it in, sacrificing time to market and yields.
Wrt what you refer to as "the 65nm process", I'd like to put it this
way: "But many that are first shall be last; and the last first" is
where I am inclined to agree in "So what else is new" :)
| Quote: |
There seems to be a near-insoluble choice between CPU power
and low electrical power, and it is likely that the multiple
core systems will have lower serial performance than the single
core ones (and not just initially).
|
Yes for the first part, in general. Not necessarily so for the latter
part. Designing multicore-µPs does not prevent you from increasing
serial performance of one core. You could use different cores (Cell
comes to mind) and you can clock the cores independently as well, e.g.
| Quote: |
I have been unable to find out anything useful about Intel's
ultra-low power process performance - 2x lower, 10x lower or
what? If it is only 2x, then the process looks VERY interesting
for multi-core work. If 10x, forget it for that.
|
A common misunderstanding. While you can always use process parameters
for "boutique lines" known to produce lower power sweetspot, low power
labels are a small fraction of its joint-manufacturing processes with
such characteristics. :) You can buy these - for a premium, which might
be considered as evidence there is intelligence on earth indeed. :)
More generally, I believe Intels designs for manufacturability are best
understood from an underlying paradigm to allocate ressources strictly
to the combination for minimizing cost. If you want, transfer "hardware
is cheap, software is expensive" of comp.arch's scope to "marketing is
cheap, hardware is expensive" in Intels scope. :)
| Quote: |
There are hints of serious problems with lithography and other
issues at 45 nm, which may indicate that it will slip by at
least a year, perhaps two. But that is very much a tea-leaf
guess, and I wouldn't put money on it either way.
|
Yup. I don't go for a limb here either. However I would not be surprised
at all if the above bible quote will apply once again. :)
K. |
|
| Back to top |
|
|
Nick Maclaren
Guest
|
| Posted:
Wed Sep 28, 2005 4:15 pm Post subject:
Re: On-current, voltage and GHz |
|
|
In article <1127919203.526765.161770@o13g2000cwo.googlegroups.com>,
MitchAlsup@aol.com writes:
|>
|> Nick Maclaren wrote:
|> > There seems to be a near-insoluble choice between CPU power
|> > and low electrical power, and it is likely that the multiple
|> > core systems will have lower serial performance than the single
|> > core ones (and not just initially).
|>
|> What is happening is the end of the (simple) voltage scaling era. ...
Thanks for the information.
|> Finally, in the 90nm-45nm the wires are getting slower just about as
|> fast as the transistors are getting faster. ...
Yes. Intel's 130, 90 and 65 nm processes use 6, 7 and 8 layers
of wiring, respectively. That won't be just because they can.
|> An awful lot of power in modern processors is condumed by the various
|> predictors, buffers, and queues. An unuseful amount of this power then
|> gets throw into the trash when the speculation(s) are found to be
|> incorrect.
Yes :-(
|> I suspect (without any actual knowledge) that Intel has found a small
|> range of Vtns with carefully controled doping profiles and gate oxide
|> thicknesses and sidewall spacers where they can get reasonable leakage
|> and at the same time reasonable transistor performance. This is after
|> Intel has simultaneously gone through the design(s) and done all of the
|> acedemic power controlling tricks (and then some).
That fits with my reading of those foils. Unfortunately, what I
don't know is any numbers.
Regards,
Nick Maclaren. |
|
| Back to top |
|
|
Guest
|
| Posted:
Wed Sep 28, 2005 4:15 pm Post subject:
Re: On-current, voltage and GHz |
|
|
Nick Maclaren wrote:
| Quote: | There seems to be a near-insoluble choice between CPU power
and low electrical power, and it is likely that the multiple
core systems will have lower serial performance than the single
core ones (and not just initially).
|
What is happening is the end of the (simple) voltage scaling era.
In the past we had enough Vdd (voltage) such that we had about 4*Vtns
(four threshold voltages) between ground and rail (Vdd). With this much
margin lots of analog transistor effects could be used (sense
amplifiers, delay circuits,...).
Now this is changing. To control the leakage currents one wants to
increase the Vtn since leakage current is a very strong function of Vtn
(higher is lots better). On the other hand, IdSat is also strong
function of Vtn in the opposite direction (lower is better--but the
speed effect is not as strong as the leakage effect wrt Vtns). So one
has to carefully choose between fast transistor performance and low
leakage. Processors used to simply go for the fastest transistors
possible, while DRAMs went for the lowest leakage transistors possible
(at any given process step).
Finally, in the 90nm-45nm the wires are getting slower just about as
fast as the transistors are getting faster. Simple scaling indicates
that wires should be insensitive to shrinking, as lower capacitance is
balanced with higher resistance. But with the metalurgy involved
(especially barrier metals) the conducting part of the wires is
shrinking faster than the lithography, and by using rather tall aspect
ratio of the wires, the sidewall capacitance is not shrinking as fast
as scaling would imply. Both effects make the wires slower.
An awful lot of power in modern processors is condumed by the various
predictors, buffers, and queues. An unuseful amount of this power then
gets throw into the trash when the speculation(s) are found to be
incorrect.
| Quote: | I have been unable to find out anything useful about Intel's
ultra-low power process performance - 2x lower, 10x lower or
what? If it is only 2x, then the process looks VERY interesting
for multi-core work. If 10x, forget it for that.
|
I suspect (without any actual knowledge) that Intel has found a small
range of Vtns with carefully controled doping profiles and gate oxide
thicknesses and sidewall spacers where they can get reasonable leakage
and at the same time reasonable transistor performance. This is after
Intel has simultaneously gone through the design(s) and done all of the
acedemic power controlling tricks (and then some). |
|
| Back to top |
|
|
Del Cecchi
Guest
|
| Posted:
Wed Sep 28, 2005 11:15 pm Post subject:
Re: On-current, voltage and GHz |
|
|
MitchAlsup@aol.com wrote:
snip
| Quote: | Finally, in the 90nm-45nm the wires are getting slower just about as
fast as the transistors are getting faster. Simple scaling indicates
that wires should be insensitive to shrinking, as lower capacitance is
balanced with higher resistance. But with the metalurgy involved
(especially barrier metals) the conducting part of the wires is
shrinking faster than the lithography, and by using rather tall aspect
ratio of the wires, the sidewall capacitance is not shrinking as fast
as scaling would imply. Both effects make the wires slower.
|
And don't forget good old fringing fields. make a narrow wire half as
wide, capacitance doesn't go down by half.
snip
| Quote: |
I suspect (without any actual knowledge) that Intel has found a small
range of Vtns with carefully controled doping profiles and gate oxide
thicknesses and sidewall spacers where they can get reasonable leakage
and at the same time reasonable transistor performance. This is after
Intel has simultaneously gone through the design(s) and done all of the
acedemic power controlling tricks (and then some).
That's why the process guys get the big bucks. :-) |
--
Del Cecchi
"This post is my own and doesn’t necessarily represent IBM’s positions,
strategies or opinions.” |
|
| Back to top |
|
|
Nick Maclaren
Guest
|
| Posted:
Thu Sep 29, 2005 12:11 am Post subject:
Re: On-current, voltage and GHz |
|
|
In article <3q04uvFc9ov4U1@individual.net>,
Del Cecchi <cecchinospam@us.ibm.com> wrote:
| Quote: |
That's why the process guys get the big bucks. :-)
|
If anyone had asked me whether you could use 193 nm light to etch
fairly sharp strips 35 and 30 nm wide, I would have said that it
was mathematically impossible. I would have been wrong :-)
Regards,
Nick Maclaren. |
|
| Back to top |
|
|
Eric P.
Guest
|
| Posted:
Thu Sep 29, 2005 12:15 am Post subject:
Re: On-current, voltage and GHz |
|
|
Del Cecchi wrote:
| Quote: |
Nick Maclaren wrote:
In article <3q0aeiFbtn7bU1@individual.net>,
Del Cecchi <cecchinospam@us.ibm.com> wrote:
Nick Maclaren wrote:
That's why the process guys get the big bucks. :-)
If anyone had asked me whether you could use 193 nm light to etch
fairly sharp strips 35 and 30 nm wide, I would have said that it
was mathematically impossible. I would have been wrong :-)
They do all sorts of things that, when I first heard of them, my
reaction was "that will never work". Check out Chem Mechanical
Polishing (CMP) used to planarize 300 mm wafers so just the tops of the
vias stick out prior to depositing another layer of metal. Or the idea
of immersion optics....
Yeah, but that's so much voodoo - I thought that I understood the
relatively elementary mathematics used in diffraction theory ....
On second thoughts, perhaps they DO use voodoo - who am I to know
what they get up to?
Regards,
Nick Maclaren.
Read up on "phase contrast masks"
|
What about this negative index of refraction and 'perfect lens'
stuff I have been hearing about for the last few years. e.g.
Beating the diffraction limit: Negative-index materials are
being used to make lenses with perfect image reconstruction
http://physicsweb.org/articles/world/17/5/3
Does that look like it will have an impact?
Eric |
|
| Back to top |
|
|
Nick Maclaren
Guest
|
| Posted:
Thu Sep 29, 2005 12:15 am Post subject:
Re: On-current, voltage and GHz |
|
|
In article <3q0aeiFbtn7bU1@individual.net>,
Del Cecchi <cecchinospam@us.ibm.com> wrote:
| Quote: | Nick Maclaren wrote:
That's why the process guys get the big bucks. :-)
If anyone had asked me whether you could use 193 nm light to etch
fairly sharp strips 35 and 30 nm wide, I would have said that it
was mathematically impossible. I would have been wrong :-)
They do all sorts of things that, when I first heard of them, my
reaction was "that will never work". Check out Chem Mechanical
Polishing (CMP) used to planarize 300 mm wafers so just the tops of the
vias stick out prior to depositing another layer of metal. Or the idea
of immersion optics....
|
Yeah, but that's so much voodoo - I thought that I understood the
relatively elementary mathematics used in diffraction theory ....
On second thoughts, perhaps they DO use voodoo - who am I to know
what they get up to?
Regards,
Nick Maclaren. |
|
| Back to top |
|
|
Del Cecchi
Guest
|
| Posted:
Thu Sep 29, 2005 12:15 am Post subject:
Re: On-current, voltage and GHz |
|
|
Nick Maclaren wrote:
| Quote: | In article <3q04uvFc9ov4U1@individual.net>,
Del Cecchi <cecchinospam@us.ibm.com> wrote:
That's why the process guys get the big bucks. :-)
If anyone had asked me whether you could use 193 nm light to etch
fairly sharp strips 35 and 30 nm wide, I would have said that it
was mathematically impossible. I would have been wrong :-)
Regards,
Nick Maclaren.
|
They do all sorts of things that, when I first heard of them, my
reaction was "that will never work". Check out Chem Mechanical
Polishing (CMP) used to planarize 300 mm wafers so just the tops of the
vias stick out prior to depositing another layer of metal. Or the idea
of immersion optics....
--
Del Cecchi
"This post is my own and doesn’t necessarily represent IBM’s positions,
strategies or opinions.” |
|
| Back to top |
|
|
Del Cecchi
Guest
|
| Posted:
Thu Sep 29, 2005 12:15 am Post subject:
Re: On-current, voltage and GHz |
|
|
Nick Maclaren wrote:
| Quote: | In article <3q0aeiFbtn7bU1@individual.net>,
Del Cecchi <cecchinospam@us.ibm.com> wrote:
Nick Maclaren wrote:
That's why the process guys get the big bucks. :-)
If anyone had asked me whether you could use 193 nm light to etch
fairly sharp strips 35 and 30 nm wide, I would have said that it
was mathematically impossible. I would have been wrong :-)
They do all sorts of things that, when I first heard of them, my
reaction was "that will never work". Check out Chem Mechanical
Polishing (CMP) used to planarize 300 mm wafers so just the tops of the
vias stick out prior to depositing another layer of metal. Or the idea
of immersion optics....
Yeah, but that's so much voodoo - I thought that I understood the
relatively elementary mathematics used in diffraction theory ....
On second thoughts, perhaps they DO use voodoo - who am I to know
what they get up to?
Regards,
Nick Maclaren.
|
Read up on "phase contrast masks"
--
Del Cecchi
"This post is my own and doesn’t necessarily represent IBM’s positions,
strategies or opinions.” |
|
| Back to top |
|
|
Terje Mathisen
Guest
|
| Posted:
Thu Sep 29, 2005 12:15 am Post subject:
Re: On-current, voltage and GHz |
|
|
Nick Maclaren wrote:
| Quote: | In article <3q04uvFc9ov4U1@individual.net>,
Del Cecchi <cecchinospam@us.ibm.com> wrote:
That's why the process guys get the big bucks. :-)
If anyone had asked me whether you could use 193 nm light to etch
fairly sharp strips 35 and 30 nm wide, I would have said that it
was mathematically impossible. I would have been wrong :-)
|
Having my degree in fiber optics, I would have said that it was
physically impossible. I don't know if that is a stronger or weaker
statement than yours. :-)
Terje
--
- <Terje.Mathisen@hda.hydro.com>
"almost all programming can be viewed as an exercise in caching" |
|
| Back to top |
|
|
Iain McClatchie
Guest
|
| Posted:
Thu Sep 29, 2005 8:00 am Post subject:
Re: On-current, voltage and GHz |
|
|
Del> Or the idea of immersion optics....
IIUC, nobody has production-level immersion optics yet. The
problem of keeping the fluid clean has not been solved.
And it was practical problems like that that killed off the
Fluorine 157nm lasers... at least so far.
As for negative-index-of-refraction stuff, my understanding
is that the wavelengths used have to be larger than the
repeated units in the metamaterial. The repeated units have
things like wire rings (defined by the transition from
conductive to nonconductive material) in them, so presumably
there is *some* limit to how small wavelengths can be
manipulated.
Here's what I'd like to know: the curved surfaces on lenses
cannot be perfectly curved, because they're made of atoms.
Worse yet, those atoms are generally in crystalline form.
So why don't we see some sort of quanta effects in the
focussed image?
My guess so far: we do, but we see the fourier transforms
of the quanta effects, across the whole image. But that
leaves me wondering why the quanta effects don't tend to
reinforce at some points and cancel at others, since you'd
think they'd have a lens-surface-wide pattern to them. |
|
| Back to top |
|
|
Guest
|
| Posted:
Thu Sep 29, 2005 9:36 pm Post subject:
Re: On-current, voltage and GHz |
|
|
Terje Mathisen wrote:
| Quote: | Nick Maclaren wrote:
In article <3q04uvFc9ov4U1@individual.net>,
Del Cecchi <cecchinospam@us.ibm.com> wrote:
That's why the process guys get the big bucks. :-)
If anyone had asked me whether you could use 193 nm light to etch
fairly sharp strips 35 and 30 nm wide, I would have said that it
was mathematically impossible. I would have been wrong :-)
Having my degree in fiber optics, I would have said that it was
physically impossible. I don't know if that is a stronger or weaker
statement than yours. :-)
|
It is my observation that, in the field of optics, physically
impossible only means that it costs 100X more to solve the problem than
if it were physically possible. |
|
| Back to top |
|
|
|
|
|
|
FAQ
Memberlist
Register
Profile
Log in to check your private messages
Log in