u_stadler@yahoo.de
Guest
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 Posted:
Wed Dec 28, 2005 5:15 pm Post subject:
ISE WebPack Clock Signals |
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HI
i'm working on a project where I get the following warning message:
-----------------------------------+---------------------------------------------+-------+
Clock Signal | Clock buffer(FF name) |
Load |
-----------------------------------+---------------------------------------------+-------+
CLK_4MHZ1(CLK_4MHZ1:O) |
BUFG(*)(I_Sensor_Interface/s_Clock_Count_11)| 32 |
CLK | I_Clock/DCM_INST:CLKFX
| 3 |
-----------------------------------+---------------------------------------------+-------+
(*) This 1 clock signal(s) are generated by combinatorial logic,
and XST is not able to identify which are the primary clock signals.
Please use the CLOCK_SIGNAL constraint to specify the clock signal(s)
generated by combinatorial logic.
How can I tell Ise what my primary clock signal is or what do i have to
do?
Thanks
Urban |
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