CASTalk.com

by **Dr Justice** » Tue Apr 12, 2005 2:12 pm

Hi!

I'm making a PCI card which currently has the Xilinx Spartan-II
designed in beacuse of its ability to interface directly to the 5V bus.

I notice that the Spartan-II has partly disappeared from the Xilinx site,
as in hard to find (not longer listed amongst their FPGA products)
and not available in their online shop anymore.

I strikes me that "the world" really needs a 5V capable device,
and that it's just a bit strange that a major manufacturer decides
to no longer make devices that has 5V support. It is likely that
this capability will be useful for another few tens of years.

Of course there are level converters and that is probably the obvious
solution. However, that seems inelegant, and they bring in a new set
of problems, such as increased cost and complexity and increased
set up and hold times etc.. Also there seems to not be a particularily
good selection of level converters.

Thus I have two questions:

1.
How do you go about building FPGA based PCI cards, or indeed
anything that needs to interface to 5V; What's your favourite
device (family) for this? Do you use level converters, if so which ones?

2.
I'd prefer that the parts we end up with will be easily available
in small quantities for the next 4 or 5 years.
Does that make the Spartan-II a bad choice?

Any advice will be appreciated - thanks!

DJ
--

by **Austin Lesea** » Tue Apr 12, 2005 3:12 pm

Dr,

Spartan 2 will be around a long time. That we have demoted it from the
limelight is a marketing issue (just so much shelf space for the new
products to showcase).

As you may be aware, we still provide the 3100A series of FPGAs, which
are still supporting designs done 15 years ago!

We discontinue devices once they are not able to be manufactured and
sold economically. This means that there is little business, and the
process used to make the chips has become obsolete at the fabrication
facilities. We also may discontinue a particular part/package
combination when that package is running at extremely low volumes or
becomes difficult to procure.

Since we are still making almost all of our FPGA products, I don't think
you have anything to worry about with Spartan II.

The original Virtex, and Spartan II are a lot like classic Coca-Cola --
they may never go away.

However, the cost/function of newer devices is so much better than the
older devices, that you may want to consider designing with the latest
devices (at some point).

The app notes we have published for 5V PCI details all of the tricks to
make the latest 90nm devices work on the 5V PCI bus. (Xapp 646, 311)

I hope this helps,

Austin

by **Dr Justice** » Tue Apr 12, 2005 4:13 pm

Austin,

thanks a lot for your reply - that was most reassuring,
and I got both questions answered!

The original Virtex, and Spartan II are a lot like classic Coca-Cola --
they may never go away.

That's kind of what I was hoping for :-)

The app notes we have published for 5V PCI details all of the tricks to
make the latest 90nm devices work on the 5V PCI bus. (Xapp 646, 311)

I have overlooked said application note - shall download it at once
and study it carefully. Anyway it's good to know that the Spartan-II
will remain in production.

Regards,

DJ
--

by **gja** » Tue Apr 12, 2005 11:04 pm

Austin,
Maybe you can give me more insight to a problem I have with xapp646. The
note states that "Since the device is a set of series-connected NMOS
transistors, any voltage larger than a few hundred millivolts below the VCC
pin voltage will be cut off."
From reading the IDT appnotes and what I'm seeing on a circuit board, the
output will always be limited to less than VCC-1. With VCC at 3.3v as shown
in xapp646, under light loading, the output voltage is about 2.3v, and with
a 10k load, it's closer to 2v which means essentially no noise margin for
TTL. Look at figure 4 of http://www1.idt.com/pcms/tempDocs/AN_11.pdf or
figure 5 of http://www1.idt.com/pcms/tempDocs/quick ... basics.pdf
Do you think that I should be seeing around 2 to 2.3v output with the ckt
shown in xapp646?

Dr, take a look at TI's sn74cb3t3384 or sn74cbtd3384c as well as some
appnotes on their site.

gja

"Austin Lesea" <austin@xilinx.com> wrote in message
news:d3gogs$lr91@cliff.xsj.xilinx.com...

Dr,

Spartan 2 will be around a long time. That we have demoted it from the
limelight is a marketing issue (just so much shelf space for the new
products to showcase).

As you may be aware, we still provide the 3100A series of FPGAs, which are
still supporting designs done 15 years ago!

We discontinue devices once they are not able to be manufactured and sold
economically. This means that there is little business, and the process
used to make the chips has become obsolete at the fabrication facilities.
We also may discontinue a particular part/package combination when that
package is running at extremely low volumes or becomes difficult to
procure.

Since we are still making almost all of our FPGA products, I don't think
you have anything to worry about with Spartan II.

The original Virtex, and Spartan II are a lot like classic Coca-Cola --
they may never go away.

However, the cost/function of newer devices is so much better than the
older devices, that you may want to consider designing with the latest
devices (at some point).

The app notes we have published for 5V PCI details all of the tricks to
make the latest 90nm devices work on the 5V PCI bus. (Xapp 646, 311)

I hope this helps,

Austin

by **Dr Justice** » Wed Apr 13, 2005 12:03 am

"gja" <geeja@hotmail.com> wrote in message
news:luY6e.1145$FQ.507@fe10.lga...
[snip]

Dr, take a look at TI's sn74cb3t3384 or sn74cbtd3384c as well as some
appnotes on their site.

Will do. Thanks for the tip!

DJ
--

by **Austin Lesea** » Wed Apr 13, 2005 3:16 pm

gja,

Basically, I am using the fact that the IDT device is just a simple NMOS
transistor, and since I know how that works (physically) I am ignoring
the data sheet (as it is misleading in this case).

I know that IDT does not support this from their data sheet
specifications, and they actually called me to tell me that they would
not support this.

Odd. It works fine. They are sand-bagging their specifications like
crazy here, and their parts work far better than the data sheet implies
(in this circuit).

Could be the loading (none), could be the voltages (less variation than
what they spec), could be they don't want to support the application.
Fine, call Xilinx. I'd much rather you call us than IDT. OK by me. We
have built it, used it, tested it, and are still doing so. I know a lot
of folks out there who have done likewise. Haven't heard a single
complaint.

Officially, the PCI specification does not allow any devices to be
placed in series with a PCI compatible part. That is fine as well.

Austin

gja wrote:

Austin,
Maybe you can give me more insight to a problem I have with xapp646. The
note states that "Since the device is a set of series-connected NMOS
transistors, any voltage larger than a few hundred millivolts below the VCC
pin voltage will be cut off."
From reading the IDT appnotes and what I'm seeing on a circuit board, the
output will always be limited to less than VCC-1. With VCC at 3.3v as shown
in xapp646, under light loading, the output voltage is about 2.3v, and with
a 10k load, it's closer to 2v which means essentially no noise margin for
TTL. Look at figure 4 of http://www1.idt.com/pcms/tempDocs/AN_11.pdf or
figure 5 of http://www1.idt.com/pcms/tempDocs/quick ... basics.pdf
Do you think that I should be seeing around 2 to 2.3v output with the ckt
shown in xapp646?

Dr, take a look at TI's sn74cb3t3384 or sn74cbtd3384c as well as some
appnotes on their site.

gja

"Austin Lesea" <austin@xilinx.com> wrote in message
news:d3gogs$lr91@cliff.xsj.xilinx.com...

Dr,

Spartan 2 will be around a long time. That we have demoted it from the
limelight is a marketing issue (just so much shelf space for the new
products to showcase).

As you may be aware, we still provide the 3100A series of FPGAs, which are
still supporting designs done 15 years ago!

We discontinue devices once they are not able to be manufactured and sold
economically. This means that there is little business, and the process
used to make the chips has become obsolete at the fabrication facilities.
We also may discontinue a particular part/package combination when that
package is running at extremely low volumes or becomes difficult to
procure.

Since we are still making almost all of our FPGA products, I don't think
you have anything to worry about with Spartan II.

The original Virtex, and Spartan II are a lot like classic Coca-Cola --
they may never go away.

However, the cost/function of newer devices is so much better than the
older devices, that you may want to consider designing with the latest
devices (at some point).

The app notes we have published for 5V PCI details all of the tricks to
make the latest 90nm devices work on the 5V PCI bus. (Xapp 646, 311)

I hope this helps,

Austin

by **Ben Twijnstra** » Wed Apr 13, 2005 4:36 pm

Hi Austin,

Officially, the PCI specification does not allow any devices to be
placed in series with a PCI compatible part. That is fine as well.

Hmmm... I thought that PCI-Compliant was "nothing in series", and
PCI-Compatible was "whatever you need to do to make it work".

Apart from that, I second all your statements there. Plus, I would like to
repeat here, TI seems to be more open to use for this type of application
of their sn74cbtd3384c parts.

Best regards,

Ben

by **gja** » Wed Apr 13, 2005 9:11 pm

Austin, are you saying that you've actually seen the circuit actually pass
3v across the switch ? Or are you saying that the output SHOULD be clamped
around 2.3v ?

Perhaps I should've been more clear, but I am currently testing a new ckt
board built with the circuit in xapp646 and a virtex2 part.
With the IDT vcc at 3.3v, the maximum voltage I am seeing with a scope is
about 2.3v on the output side of the switch. IE., when the virtex2 part is
driving (lvttl) one side of the switch at 3.3v, the other side of the switch
is about 2.3v. When the 5v ttl part 74FCT645 is writing to the virtex2 part,
I see 4v on that side of the switch and 2.3v on the virtex2 side. When I
originally looked at xapp646, it stated that it would clamp to less than ~3v
outputs, I didn't think it would be closer to 2.3v. If I had used the
implementation in IDT's or TI's appnote where they drive the vcc pin at
4.3v using a diode from 5v, I wonder if that would have worked better.

gja

"Austin Lesea" <austin@xilinx.com> wrote in message
news:d3jd3k$mb11@cliff.xsj.xilinx.com...

gja,

Basically, I am using the fact that the IDT device is just a simple NMOS
transistor, and since I know how that works (physically) I am ignoring the
data sheet (as it is misleading in this case).

I know that IDT does not support this from their data sheet
specifications, and they actually called me to tell me that they would not
support this.

Odd. It works fine. They are sand-bagging their specifications like
crazy here, and their parts work far better than the data sheet implies
(in this circuit).

Could be the loading (none), could be the voltages (less variation than
what they spec), could be they don't want to support the application.
Fine, call Xilinx. I'd much rather you call us than IDT. OK by me. We
have built it, used it, tested it, and are still doing so. I know a lot
of folks out there who have done likewise. Haven't heard a single
complaint.

Officially, the PCI specification does not allow any devices to be placed
in series with a PCI compatible part. That is fine as well.

Austin

gja wrote:
Austin,
Maybe you can give me more insight to a problem I have with xapp646. The
note states that "Since the device is a set of series-connected NMOS
transistors, any voltage larger than a few hundred millivolts below the
VCC pin voltage will be cut off."
From reading the IDT appnotes and what I'm seeing on a circuit board, the
output will always be limited to less than VCC-1. With VCC at 3.3v as
shown in xapp646, under light loading, the output voltage is about 2.3v,
and with a 10k load, it's closer to 2v which means essentially no noise
margin for TTL. Look at figure 4 of
http://www1.idt.com/pcms/tempDocs/AN_11.pdf or figure 5 of
http://www1.idt.com/pcms/tempDocs/quick ... basics.pdf
Do you think that I should be seeing around 2 to 2.3v output with the ckt
shown in xapp646?

Dr, take a look at TI's sn74cb3t3384 or sn74cbtd3384c as well as some
appnotes on their site.

gja

"Austin Lesea" <austin@xilinx.com> wrote in message
news:d3gogs$lr91@cliff.xsj.xilinx.com...

Dr,

Spartan 2 will be around a long time. That we have demoted it from the
limelight is a marketing issue (just so much shelf space for the new
products to showcase).

As you may be aware, we still provide the 3100A series of FPGAs, which
are still supporting designs done 15 years ago!

We discontinue devices once they are not able to be manufactured and sold
economically. This means that there is little business, and the process
used to make the chips has become obsolete at the fabrication facilities.
We also may discontinue a particular part/package combination when that
package is running at extremely low volumes or becomes difficult to
procure.

Since we are still making almost all of our FPGA products, I don't think
you have anything to worry about with Spartan II.

The original Virtex, and Spartan II are a lot like classic Coca-Cola --
they may never go away.

However, the cost/function of newer devices is so much better than the
older devices, that you may want to consider designing with the latest
devices (at some point).

The app notes we have published for 5V PCI details all of the tricks to
make the latest 90nm devices work on the 5V PCI bus. (Xapp 646, 311)

I hope this helps,

Austin

by **Austin Lesea** » Wed Apr 13, 2005 9:40 pm

gja,

See below,

Austin

gja wrote:

Austin, are you saying that you've actually seen the circuit actually pass
3v across the switch ?
Yes, I have.

Or are you saying that the output SHOULD be clamped

around 2.3v ?
No, I am not.

Perhaps I should've been more clear, but I am currently testing a new ckt
board built with the circuit in xapp646 and a virtex2 part.
With the IDT vcc at 3.3v, the maximum voltage I am seeing with a scope is
about 2.3v on the output side of the switch. IE., when the virtex2 part is
driving (lvttl) one side of the switch at 3.3v, the other side of the switch
is about 2.3v.
Into what load? On a "real" PCI bus is where I made the measurements.

Perhaps if you use the resistor "standard termionation" (which is
anything but a standard) you will get some other result?
When the 5v ttl part 74FCT645 is writing to the virtex2 part,

I see 4v on that side of the switch and 2.3v on the virtex2 side.
OK. I will admit that the TI part has some advantages, but it is also

an active device, and adds delay, doesn't it?
When I

originally looked at xapp646, it stated that it would clamp to less than ~3v
outputs, I didn't think it would be closer to 2.3v. If I had used the
implementation in IDT's or TI's appnote where they drive the vcc pin at
4.3v using a diode from 5v, I wonder if that would have worked better.
Except that then you do not limit the voltages to less than what we require.

by **Ben Twijnstra** » Wed Apr 13, 2005 10:23 pm

Hi Austin,

OK. I will admit that the TI part has some advantages, but it is also
an active device, and adds delay, doesn't it?

Yep. About 500ps worst-case. I tell my users to edit the constraint file so
that because of this, all PCI signals should have 1ns subtracted from their
timing constraints. This takes care of the combinatorial delays as well.

In Quartus, the difference is unnoticeable with a 33MHz bus and usually adds
a little compilation time with a 66MHz bus. I'd hope the same situation
would apply to Xilinx users.

Best regards,

Ben

by **gja** » Thu Apr 14, 2005 12:45 am

Austin, thank you for your responses. My replies are below:

"Austin Lesea" <austin@xilinx.com> wrote in message
news:d3k3jm$mav1@cliff.xsj.xilinx.com...

gja,

See below,

Austin

gja wrote:
Austin, are you saying that you've actually seen the circuit actually
pass 3v across the switch ?
Yes, I have.

OK, I will have to investigate further now that I know that it should.

Or are you saying that the output SHOULD be clamped
around 2.3v ?
No, I am not.

Perhaps I should've been more clear, but I am currently testing a new ckt
board built with the circuit in xapp646 and a virtex2 part.
With the IDT vcc at 3.3v, the maximum voltage I am seeing with a scope
is about 2.3v on the output side of the switch. IE., when the virtex2
part is driving (lvttl) one side of the switch at 3.3v, the other side of
the switch is about 2.3v.
Into what load? On a "real" PCI bus is where I made the measurements.
Perhaps if you use the resistor "standard termionation" (which is anything
but a standard) you will get some other result?

My application uses the switch to connect a Virtex2 to a slow (1us access
times) 5v TTL databus, not PCI. The virtex2 pins are configured as lvcmos33
iobuf and is the only device on one side of the quickswitch, so I don't
think it is a loading problem. When the 5v FCT chip is driving the virtex2
(thru the switch), I see 4v on the ttl side but only 2.3v on the virtex2
side.

When the 5v ttl part 74FCT645 is writing to the virtex2 part,
I see 4v on that side of the switch and 2.3v on the virtex2 side.
OK. I will admit that the TI part has some advantages, but it is also an
active device, and adds delay, doesn't it?

No, the TI devices SN74CB3T3384 and SN74CBTD3384C are also FET switches
with the same delay spec as the IDT part. The SN74CB3T3384 device uses a
vcc of 3.3v while the SN74CBTD3384C uses 5v. Both devices claim to do 5v to
3.3 v level translation.

When I
originally looked at xapp646, it stated that it would clamp to less than
~3v outputs, I didn't think it would be closer to 2.3v. If I had used
the implementation in IDT's or TI's appnote where they drive the vcc pin
at 4.3v using a diode from 5v, I wonder if that would have worked better.
Except that then you do not limit the voltages to less than what we
require.

They do because the QS3861 clamps to VCC-1, so 4.3 - 1 = 3.3v

by **gja** » Thu Apr 14, 2005 6:35 pm

I investigated further and was able to get 3v across the switch by
isolating the TTL side of the switch from the rest of the bus and driving
the switch with a signal generator.
And for some reason now, with everything as it was, I do see 3v on the
virtex2 side of the switch, even though I know at one point I did not. So I
will continue investigating based on the assumption that something on the
TTL bus is loading the bus down when performing a read from the virtex2
device.
Austin, thanks again for letting me know that what I was seeing was
abnormal, and that I should relook at it.

gja

"gja" <geeja@hotmail.com> wrote in message
news:F2j7e.211$V02.115@fe08.lga...

Austin, thank you for your responses. My replies are below:

"Austin Lesea" <austin@xilinx.com> wrote in message
news:d3k3jm$mav1@cliff.xsj.xilinx.com...
gja,

See below,

Austin

gja wrote:
Austin, are you saying that you've actually seen the circuit actually
pass 3v across the switch ?
Yes, I have.

OK, I will have to investigate further now that I know that it should.

Or are you saying that the output SHOULD be clamped
around 2.3v ?
No, I am not.

Perhaps I should've been more clear, but I am currently testing a new
ckt
board built with the circuit in xapp646 and a virtex2 part.
With the IDT vcc at 3.3v, the maximum voltage I am seeing with a scope
is about 2.3v on the output side of the switch. IE., when the virtex2
part is driving (lvttl) one side of the switch at 3.3v, the other side
of
the switch is about 2.3v.
Into what load? On a "real" PCI bus is where I made the measurements.
Perhaps if you use the resistor "standard termionation" (which is
anything
but a standard) you will get some other result?

My application uses the switch to connect a Virtex2 to a slow (1us access
times) 5v TTL databus, not PCI. The virtex2 pins are configured as
lvcmos33
iobuf and is the only device on one side of the quickswitch, so I don't
think it is a loading problem. When the 5v FCT chip is driving the virtex2
(thru the switch), I see 4v on the ttl side but only 2.3v on the virtex2
side.

When the 5v ttl part 74FCT645 is writing to the virtex2 part,
I see 4v on that side of the switch and 2.3v on the virtex2 side.
OK. I will admit that the TI part has some advantages, but it is also
an
active device, and adds delay, doesn't it?

No, the TI devices SN74CB3T3384 and SN74CBTD3384C are also FET switches
with the same delay spec as the IDT part. The SN74CB3T3384 device uses a
vcc of 3.3v while the SN74CBTD3384C uses 5v. Both devices claim to do 5v
to
3.3 v level translation.

When I
originally looked at xapp646, it stated that it would clamp to less
than
~3v outputs, I didn't think it would be closer to 2.3v. If I had used
the implementation in IDT's or TI's appnote where they drive the vcc
pin
at 4.3v using a diode from 5v, I wonder if that would have worked
better.
Except that then you do not limit the voltages to less than what we
require.

They do because the QS3861 clamps to VCC-1, so 4.3 - 1 = 3.3v

by **Austin Lesea** » Thu Apr 14, 2005 8:28 pm

gja,

No problem. Good luck with your troubleshooting.

Austin

by **gja** » Wed May 04, 2005 12:17 am

Austin,
I hate to bring this up again, but I've just been made aware that the
circuit in XAPP646 would exceed the absolute worst case conditions for the
IDTQS3861 part. With BE and GND pins biased around 0.7v (can be as high as
0.875v if 1.5v +5%), the IDT QS3861 datasheet states ABSOLUTE MAXIMUM
RATINGS for the bus inputs as -0.5 to +7 volts. With GND at 0.875, this
means 0.375v should be the lowest voltage at the bus pins. Usually TTL Vol
is 0.4v but under light loading it's closer to 0.2v and this would violate
the max ratings.
I would like to hear your comments on this and your comments that this
circuit has actually been used in production by others without problems.

Thanks,
gja

"gja" <geeja@hotmail.com> wrote in message
news:GJy7e.496$V02.391@fe08.lga...

I investigated further and was able to get 3v across the switch by
isolating the TTL side of the switch from the rest of the bus and driving
the switch with a signal generator.
And for some reason now, with everything as it was, I do see 3v on the
virtex2 side of the switch, even though I know at one point I did not. So
I
will continue investigating based on the assumption that something on the
TTL bus is loading the bus down when performing a read from the virtex2
device.
Austin, thanks again for letting me know that what I was seeing was
abnormal, and that I should relook at it.

gja

"gja" <geeja@hotmail.com> wrote in message
news:F2j7e.211$V02.115@fe08.lga...
Austin, thank you for your responses. My replies are below:

"Austin Lesea" <austin@xilinx.com> wrote in message
news:d3k3jm$mav1@cliff.xsj.xilinx.com...
gja,

See below,

Austin

gja wrote:
Austin, are you saying that you've actually seen the circuit actually
pass 3v across the switch ?
Yes, I have.

OK, I will have to investigate further now that I know that it should.

Or are you saying that the output SHOULD be clamped
around 2.3v ?
No, I am not.

Perhaps I should've been more clear, but I am currently testing a new
ckt
board built with the circuit in xapp646 and a virtex2 part.
With the IDT vcc at 3.3v, the maximum voltage I am seeing with a
scope
is about 2.3v on the output side of the switch. IE., when the virtex2
part is driving (lvttl) one side of the switch at 3.3v, the other side
of
the switch is about 2.3v.
Into what load? On a "real" PCI bus is where I made the measurements.
Perhaps if you use the resistor "standard termionation" (which is
anything
but a standard) you will get some other result?

My application uses the switch to connect a Virtex2 to a slow (1us access
times) 5v TTL databus, not PCI. The virtex2 pins are configured as
lvcmos33
iobuf and is the only device on one side of the quickswitch, so I don't
think it is a loading problem. When the 5v FCT chip is driving the
virtex2
(thru the switch), I see 4v on the ttl side but only 2.3v on the virtex2
side.

When the 5v ttl part 74FCT645 is writing to the virtex2 part,
I see 4v on that side of the switch and 2.3v on the virtex2 side.
OK. I will admit that the TI part has some advantages, but it is also
an
active device, and adds delay, doesn't it?

No, the TI devices SN74CB3T3384 and SN74CBTD3384C are also FET switches
with the same delay spec as the IDT part. The SN74CB3T3384 device uses a
vcc of 3.3v while the SN74CBTD3384C uses 5v. Both devices claim to do 5v
to
3.3 v level translation.

When I
originally looked at xapp646, it stated that it would clamp to less
than
~3v outputs, I didn't think it would be closer to 2.3v. If I had used
the implementation in IDT's or TI's appnote where they drive the vcc
pin
at 4.3v using a diode from 5v, I wonder if that would have worked
better.
Except that then you do not limit the voltages to less than what we
require.

They do because the QS3861 clamps to VCC-1, so 4.3 - 1 = 3.3v

by **Austin Lesea** » Wed May 04, 2005 12:17 am

gja,

I replied back to you personally.

Xilinx stands behin the app note. I am aware of, and have stated that,
the quick switch folks do not support our application .... we do.

Fine with me, they told me that if anyone calls them about it, they
refer the call to us (and take your order).

Austin

gja wrote:

Austin,
I hate to bring this up again, but I've just been made aware that the
circuit in XAPP646 would exceed the absolute worst case conditions for the
IDTQS3861 part. With BE and GND pins biased around 0.7v (can be as high as
0.875v if 1.5v +5%), the IDT QS3861 datasheet states ABSOLUTE MAXIMUM
RATINGS for the bus inputs as -0.5 to +7 volts. With GND at 0.875, this
means 0.375v should be the lowest voltage at the bus pins. Usually TTL Vol
is 0.4v but under light loading it's closer to 0.2v and this would violate
the max ratings.
I would like to hear your comments on this and your comments that this
circuit has actually been used in production by others without problems.

Thanks,
gja

"gja" <geeja@hotmail.com> wrote in message
news:GJy7e.496$V02.391@fe08.lga...

I investigated further and was able to get 3v across the switch by
isolating the TTL side of the switch from the rest of the bus and driving
the switch with a signal generator.
And for some reason now, with everything as it was, I do see 3v on the
virtex2 side of the switch, even though I know at one point I did not. So
I
will continue investigating based on the assumption that something on the
TTL bus is loading the bus down when performing a read from the virtex2
device.
Austin, thanks again for letting me know that what I was seeing was
abnormal, and that I should relook at it.

gja

"gja" <geeja@hotmail.com> wrote in message
news:F2j7e.211$V02.115@fe08.lga...

Austin, thank you for your responses. My replies are below:

"Austin Lesea" <austin@xilinx.com> wrote in message
news:d3k3jm$mav1@cliff.xsj.xilinx.com...

gja,

See below,

Austin

gja wrote:

Austin, are you saying that you've actually seen the circuit actually
pass 3v across the switch ?

Yes, I have.

OK, I will have to investigate further now that I know that it should.

Or are you saying that the output SHOULD be clamped

around 2.3v ?

No, I am not.

Perhaps I should've been more clear, but I am currently testing a new

ckt

board built with the circuit in xapp646 and a virtex2 part.
With the IDT vcc at 3.3v, the maximum voltage I am seeing with a
scope
is about 2.3v on the output side of the switch. IE., when the virtex2
part is driving (lvttl) one side of the switch at 3.3v, the other side

of

the switch is about 2.3v.

Into what load? On a "real" PCI bus is where I made the measurements.
Perhaps if you use the resistor "standard termionation" (which is

anything

but a standard) you will get some other result?

My application uses the switch to connect a Virtex2 to a slow (1us access
times) 5v TTL databus, not PCI. The virtex2 pins are configured as

lvcmos33

iobuf and is the only device on one side of the quickswitch, so I don't
think it is a loading problem. When the 5v FCT chip is driving the
virtex2
(thru the switch), I see 4v on the ttl side but only 2.3v on the virtex2
side.

When the 5v ttl part 74FCT645 is writing to the virtex2 part,

I see 4v on that side of the switch and 2.3v on the virtex2 side.

OK. I will admit that the TI part has some advantages, but it is also

an

active device, and adds delay, doesn't it?

No, the TI devices SN74CB3T3384 and SN74CBTD3384C are also FET switches
with the same delay spec as the IDT part. The SN74CB3T3384 device uses a
vcc of 3.3v while the SN74CBTD3384C uses 5v. Both devices claim to do 5v

to

3.3 v level translation.

When I

originally looked at xapp646, it stated that it would clamp to less

than

~3v outputs, I didn't think it would be closer to 2.3v. If I had used
the implementation in IDT's or TI's appnote where they drive the vcc

pin

at 4.3v using a diode from 5v, I wonder if that would have worked

better.

Except that then you do not limit the voltages to less than what we
require.

They do because the QS3861 clamps to VCC-1, so 4.3 - 1 = 3.3v

CASTalk.com

5V PCI interface

5V PCI interface

Re: 5V PCI interface

Re: 5V PCI interface

Re: 5V PCI interface

Re: 5V PCI interface

Re: 5V PCI interface

Re: 5V PCI interface

Re: 5V PCI interface

Re: 5V PCI interface

Re: 5V PCI interface

Re: 5V PCI interface

Re: 5V PCI interface

Re: 5V PCI interface

Re: 5V PCI interface

Re: 5V PCI interface

Who is online